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authorGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:01 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:01 -0500
commit81fdced83f21db2fc1da1541365166fbd5918027 (patch)
tree977dffd524f89206f9607b8b9f82ede94e42db20 /src/arch/arm/isa/formats/mem.isa
parent321d3a6e8c9ed9511f7944c8ad8dbd16508cb5ad (diff)
downloadgem5-81fdced83f21db2fc1da1541365166fbd5918027.tar.xz
ARM: Define the load instructions from outside the decoder.
Diffstat (limited to 'src/arch/arm/isa/formats/mem.isa')
-rw-r--r--src/arch/arm/isa/formats/mem.isa157
1 files changed, 62 insertions, 95 deletions
diff --git a/src/arch/arm/isa/formats/mem.isa b/src/arch/arm/isa/formats/mem.isa
index 2f66ca54e..5f8a3695a 100644
--- a/src/arch/arm/isa/formats/mem.isa
+++ b/src/arch/arm/isa/formats/mem.isa
@@ -1,5 +1,17 @@
// -*- mode:c++ -*-
+// Copyright (c) 2010 ARM Limited
+// All rights reserved
+//
+// The license below extends only to copyright in the software and shall
+// not be construed as granting a license to any other intellectual
+// property including but not limited to intellectual property relating
+// to a hardware implementation of the functionality of the software
+// licensed hereunder. You may use the software subject to the license
+// terms below provided that you ensure that this notice is replicated
+// unmodified and in its entirety in all distributions of the software,
+// modified or unmodified, in source code or in binary form.
+//
// Copyright (c) 2007-2008 The Florida State University
// All rights reserved.
//
@@ -72,86 +84,6 @@ def template LoadStoreConstructor {{
}};
-def template LoadExecute {{
- Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
- {
- Addr EA;
- Fault fault = NoFault;
-
- %(op_decl)s;
- %(op_rd)s;
- %(ea_code)s;
-
- if (%(predicate_test)s)
- {
- if (fault == NoFault) {
- fault = xc->read(EA, (uint%(mem_acc_size)d_t&)Mem, memAccessFlags);
- %(memacc_code)s;
- }
-
- if (fault == NoFault) {
- %(op_wb)s;
- }
- }
-
- return fault;
- }
-}};
-
-
-def template LoadInitiateAcc {{
- Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
- {
- Addr EA;
- Fault fault = NoFault;
-
- %(op_src_decl)s;
- %(op_rd)s;
- %(ea_code)s;
-
- if (%(predicate_test)s)
- {
- if (fault == NoFault) {
- fault = xc->read(EA, (uint%(mem_acc_size)d_t &)Mem, memAccessFlags);
- }
- }
-
- return fault;
- }
-}};
-
-
-def template LoadCompleteAcc {{
- Fault %(class_name)s::completeAcc(PacketPtr pkt,
- %(CPU_exec_context)s *xc,
- Trace::InstRecord *traceData) const
- {
- Fault fault = NoFault;
-
- %(op_decl)s;
- %(op_rd)s;
-
- if (%(predicate_test)s)
- {
- // ARM instructions will not have a pkt if the predicate is false
- Mem = pkt->get<typeof(Mem)>();
-
- if (fault == NoFault) {
- %(memacc_code)s;
- }
-
- if (fault == NoFault) {
- %(op_wb)s;
- }
- }
-
- return fault;
- }
-}};
-
-
def template StoreExecute {{
Fault %(class_name)s::execute(%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) const
@@ -296,7 +228,12 @@ let {{
exec_template_base = type.capitalize())
}};
-def format AddrMode2(suffix, offset) {{
+def format AddrMode2(imm, suffix, offset) {{
+ if eval(imm):
+ imm = True
+ else:
+ imm = False
+
header_output = decoder_output = exec_output = ""
decode_block = "switch(PUBWL) {\n"
@@ -306,20 +243,50 @@ def format AddrMode2(suffix, offset) {{
for u in (0, 1):
for b in (0, 1):
for w in (0, 1):
- for l in (0, 1):
- (new_header_output,
- new_decoder_output,
- new_decode_block,
- new_exec_output) = buildMode2Inst(p, u, b, w, l,
- suffix, offset)
- header_output += new_header_output
- decoder_output += new_decoder_output
- exec_output += new_exec_output
- decode_block += '''
- case %#x:
- {%s}
- break;
- ''' % (buildPUBWLCase(p,u,b,w,l), new_decode_block)
+ (new_header_output,
+ new_decoder_output,
+ new_decode_block,
+ new_exec_output) = buildMode2Inst(p, u, b, w, 0,
+ suffix, offset)
+ header_output += new_header_output
+ decoder_output += new_decoder_output
+ exec_output += new_exec_output
+ decode_block += '''
+ case %#x:
+ {%s}
+ break;
+ ''' % (buildPUBWLCase(p,u,b,w,0), new_decode_block)
+
+ post = (p == 0)
+ user = (p == 0 and w == 0)
+ writeback = (p == 0 or w == 1)
+ add = (u == 1)
+ if b == 0:
+ size = 4
+ else:
+ size = 1
+ if add:
+ addStr = "true"
+ else:
+ addStr = "false"
+ if imm:
+ newDecode = "return new %s(machInst, RD, RN," + \
+ "%s, machInst.immed11_0);"
+ className = loadImmClassName(post, add, writeback,
+ size, False, user)
+ newDecode = newDecode % (className, addStr)
+ else:
+ newDecode = "return new %s(machInst, RD, RN, %s," + \
+ "machInst.shiftSize," + \
+ "machInst.shift, RM);"
+ className = loadRegClassName(post, add, writeback,
+ size, False, user)
+ newDecode = newDecode % (className, addStr)
+ decode_block += '''
+ case %#x:
+ {%s}
+ break;
+ ''' % (buildPUBWLCase(p,u,b,w,1), newDecode)
decode_block += '''
default:
return new Unknown(machInst);