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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:09 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:09 -0500 |
| commit | 8a7f60194ea24f63759d1985cc04c1fa8b8e2dcb (patch) | |
| tree | 20f0678c236e821cbbf819ae51f75a7697cbdb87 /src/arch/arm/isa/formats/misc.isa | |
| parent | 89133b15dae1f13cbc937077ce5b5856ed130b5f (diff) | |
| download | gem5-8a7f60194ea24f63759d1985cc04c1fa8b8e2dcb.tar.xz | |
ARM: Ignore/warn on accesses to the dccmvac register.
Diffstat (limited to 'src/arch/arm/isa/formats/misc.isa')
| -rw-r--r-- | src/arch/arm/isa/formats/misc.isa | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/arch/arm/isa/formats/misc.isa b/src/arch/arm/isa/formats/misc.isa index 2052e0d3d..8ba46960a 100644 --- a/src/arch/arm/isa/formats/misc.isa +++ b/src/arch/arm/isa/formats/misc.isa @@ -100,7 +100,10 @@ def format McrMrc15() {{ isRead ? "mrc dccisw" : "mcr dcisw", machInst); case MISCREG_DCCIMVAC: return new WarnUnimplemented( - isRead ? "mrc dccimvac" : "mcr dcimvac", machInst); + isRead ? "mrc dccimvac" : "mcr dccimvac", machInst); + case MISCREG_DCCMVAC: + return new WarnUnimplemented( + isRead ? "mrc dccmvac" : "mcr dccmvac", machInst); case MISCREG_CP15ISB: return new WarnUnimplemented( isRead ? "mrc cp15isb" : "mcr cp15isb", machInst); |