summaryrefslogtreecommitdiff
path: root/src/arch/arm/isa/formats/misc.isa
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:09 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:09 -0500
commita483d44d9fb75a3b9fb5b497b59961532674badb (patch)
tree8a9591e5806f0b5cd79de3d996d7ec55b770b253 /src/arch/arm/isa/formats/misc.isa
parent630f309a77b239d73c9140effc0210d425ffd19f (diff)
downloadgem5-a483d44d9fb75a3b9fb5b497b59961532674badb.tar.xz
ARM: Ignore/warn on accesses to icimvau.
Diffstat (limited to 'src/arch/arm/isa/formats/misc.isa')
-rw-r--r--src/arch/arm/isa/formats/misc.isa3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/arch/arm/isa/formats/misc.isa b/src/arch/arm/isa/formats/misc.isa
index 33a8ae4fe..2052e0d3d 100644
--- a/src/arch/arm/isa/formats/misc.isa
+++ b/src/arch/arm/isa/formats/misc.isa
@@ -113,6 +113,9 @@ def format McrMrc15() {{
case MISCREG_ICIALLUIS:
return new WarnUnimplemented(
isRead ? "mrc icialluis" : "mcr icialluis", machInst);
+ case MISCREG_ICIMVAU:
+ return new WarnUnimplemented(
+ isRead ? "mrc icimvau" : "mcr icimvau", machInst);
default:
if (isRead) {
return new Mrc15(machInst, rt, (IntRegIndex)miscReg);