ARM: The ARM decoder should not panic when decoding undefined holes is arch.

This can abort simulations when the fetch unit runs ahead and speculatively
decodes instructions that are off the execution path.

1 files changed, 4 insertions, 1 deletions

diff --git a/src/arch/arm/isa/formats/misc.isa b/src/arch/arm/isa/formats/misc.isa
index c2003fe6d..6a734a582 100644
--- a/src/arch/arm/isa/formats/misc.isa
+++ b/src/arch/arm/isa/formats/misc.isa
@@ -100,7 +100,10 @@ let {{
           case MISCREG_NOP:
             return new NopInst(machInst);
           case NUM_MISCREGS:
-            return new Unknown(machInst);
+            return new FailUnimplemented(
+                    csprintf("miscreg crn:%d opc1:%d crm:%d opc2:%d %s unknown",
+                    crn, opc1, crm, opc2, isRead ? "read" : "write").c_str(),
+                    machInst);
           case MISCREG_DCCISW:
             return new WarnUnimplemented(
                     isRead ? "mrc dccisw" : "mcr dcisw", machInst);