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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:13 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:13 -0500 |
| commit | c5a8a1d673b0bdd1258aa2de1706f1e9b9bab759 (patch) | |
| tree | c7d7083e44c2ead524f8d5a8fba78b42d7430ee9 /src/arch/arm/isa/formats/uncond.isa | |
| parent | 98fe7b0fbe90867a6b324d48459709a140d60da2 (diff) | |
| download | gem5-c5a8a1d673b0bdd1258aa2de1706f1e9b9bab759.tar.xz | |
ARM: Decode ARM unconditional MRC and MCR instructions.
Diffstat (limited to 'src/arch/arm/isa/formats/uncond.isa')
| -rw-r--r-- | src/arch/arm/isa/formats/uncond.isa | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/arch/arm/isa/formats/uncond.isa b/src/arch/arm/isa/formats/uncond.isa index f1bfceac1..177b67ff2 100644 --- a/src/arch/arm/isa/formats/uncond.isa +++ b/src/arch/arm/isa/formats/uncond.isa @@ -265,6 +265,8 @@ def format ArmUnconditional() {{ { if (CPNUM == 0xa || CPNUM == 0xb) { return decodeShortFpTransfer(machInst); + } else if (CPNUM == 0xf) { + return decodeMcrMrc15(machInst); } const bool op = bits(machInst, 4); if (op) { |