ARM: Add an AddrMode2 format for memory instructions that use address mode 2.

1 files changed, 51 insertions, 0 deletions

diff --git a/src/arch/arm/isa/formats/mem.isa b/src/arch/arm/isa/formats/mem.isa
index 41fd0552c..e3eed5df1 100644
--- a/src/arch/arm/isa/formats/mem.isa
+++ b/src/arch/arm/isa/formats/mem.isa
@@ -459,6 +459,26 @@ let {{
     def buildPUBWLCase(p, u, b, w, l):
         return (p << 4) + (u << 3) + (b << 2) + (w << 1) + (l << 0)
 
+    def buildMode2Inst(p, u, b, w, l, suffix, offset):
+        mnem = ("str", "ldr")[l]
+        op = ("-", "+")[u]
+        offset = op + ArmGenericCodeSubs(offset);
+        mem = ("Mem", "Mem.ub")[b]
+        code = ("%s = Rd;", "Rd = %s;")[l] % mem
+        ea_code = "EA = Rn %s;" % ("", offset)[p]
+        if p == 0 or w == 1:
+            code += "Rn = Rn %s;" % offset
+        if p == 0 and w == 0:
+            # Here's where we'll tack on a flag to make this a usermode access.
+            mnem += "t"
+        type = ("Store", "Load")[l]
+        suffix = "_%s_P%dU%dB%dW%d" % (suffix, p, u, b, w)
+        if b == 1:
+            mnem += "b"
+        return LoadStoreBase(mnem, mnem.capitalize() + suffix,
+                ea_code, code, mem_flags = [], inst_flags = [],
+                exec_template_base = type.capitalize())
+
     def buildMode3Inst(p, u, i, w, type, code, mnem):
         op = ("-", "+")[u]
         offset = ("%s Rm", "%s hilo")[i] % op
@@ -471,6 +491,37 @@ let {{
                 exec_template_base = type.capitalize())
 }};
 
+def format AddrMode2(suffix, offset) {{
+    header_output = decoder_output = exec_output = ""
+    decode_block = "switch(PUBWL) {\n"
+
+    # Loop over all the values of p, u, b, w and l and build instructions and
+    # a decode block for them.
+    for p in (0, 1):
+        for u in (0, 1):
+            for b in (0, 1):
+                for w in (0, 1):
+                    for l in (0, 1):
+                        (new_header_output,
+                         new_decoder_output,
+                         new_decode_block,
+                         new_exec_output) = buildMode2Inst(p, u, b, w, l,
+                                                           suffix, offset)
+                        header_output += new_header_output
+                        decoder_output += new_decoder_output
+                        exec_output += new_exec_output
+                        decode_block += '''
+                            case %#x:
+                              {%s}
+                              break;
+                        ''' % (buildPUBWLCase(p,u,b,w,l), new_decode_block)
+    decode_block += '''
+        default:
+          return new Unknown(machInst);
+        break;
+    }'''
+}};
+
 def format AddrMode3(l0Type, l0Code, l1Type, l1Code) {{
     l0Code = ArmGenericCodeSubs(l0Code);
     l1Code = ArmGenericCodeSubs(l1Code);