diff options
author | Ali Saidi <Ali.Saidi@ARM.com> | 2011-05-04 20:38:26 -0500 |
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committer | Ali Saidi <Ali.Saidi@ARM.com> | 2011-05-04 20:38:26 -0500 |
commit | 632cf8dd80f29f85097aa90cd704ca01cc57ff39 (patch) | |
tree | 67293ea994306fceb1156c766a08256dcbf97709 /src/arch/arm/isa/formats | |
parent | 0dffd35741fafc4d51102c7276b61306bfa73d87 (diff) | |
download | gem5-632cf8dd80f29f85097aa90cd704ca01cc57ff39.tar.xz |
ARM: Fix small bug with vcvt instruction
Diffstat (limited to 'src/arch/arm/isa/formats')
-rw-r--r-- | src/arch/arm/isa/formats/fp.isa | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/arm/isa/formats/fp.isa b/src/arch/arm/isa/formats/fp.isa index 2267ee34f..18b128836 100644 --- a/src/arch/arm/isa/formats/fp.isa +++ b/src/arch/arm/isa/formats/fp.isa @@ -2349,8 +2349,8 @@ let {{ case 0x7: if (opc3 == 0x3) { if (single) { - vm = (IntRegIndex)(bits(machInst, 5) | - (bits(machInst, 3, 0) << 1)); + vd = (IntRegIndex)((bits(machInst, 22) << 5) | + (bits(machInst, 15, 12) << 1)); return new VcvtFpSFpD(machInst, vd, vm); } else { vd = (IntRegIndex)(bits(machInst, 22) | |