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author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:14 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:14 -0500 |
commit | a430f749cefb75f58d1d1c9692e2b53f1f5252bf (patch) | |
tree | f76ade19161d96079af44ba4a362d42536e74cfb /src/arch/arm/isa/formats | |
parent | a9d1de4769ff9134c405f955965faaddc449eb06 (diff) | |
download | gem5-a430f749cefb75f58d1d1c9692e2b53f1f5252bf.tar.xz |
ARM: Implement vcvt between int and fp. Ignore rounding.
Diffstat (limited to 'src/arch/arm/isa/formats')
-rw-r--r-- | src/arch/arm/isa/formats/fp.isa | 35 |
1 files changed, 31 insertions, 4 deletions
diff --git a/src/arch/arm/isa/formats/fp.isa b/src/arch/arm/isa/formats/fp.isa index a1c11d1d1..47703a7a0 100644 --- a/src/arch/arm/isa/formats/fp.isa +++ b/src/arch/arm/isa/formats/fp.isa @@ -621,16 +621,43 @@ let {{ } break; case 0x8: - // Between FP and int. - return new WarnUnimplemented("vcvt, vcvtr", machInst); + if (bits(machInst, 7) == 0) { + if (single) { + return new VcvtUIntFpS(machInst, vd, vm); + } else { + vm = (IntRegIndex)(bits(machInst, 5) | + (bits(machInst, 3, 0) << 1)); + return new VcvtUIntFpD(machInst, vd, vm); + } + } else { + if (single) { + return new VcvtSIntFpS(machInst, vd, vm); + } else { + vm = (IntRegIndex)(bits(machInst, 5) | + (bits(machInst, 3, 0) << 1)); + return new VcvtSIntFpD(machInst, vd, vm); + } + } case 0xa: case 0xb: // Between FP and fixed point. return new WarnUnimplemented("vcvt", machInst); case 0xc: + if (single) { + return new VcvtFpUIntS(machInst, vd, vm); + } else { + vd = (IntRegIndex)(bits(machInst, 22) | + (bits(machInst, 15, 12) << 1)); + return new VcvtFpUIntD(machInst, vd, vm); + } case 0xd: - // Between FP and int. - return new WarnUnimplemented("vcvt, vcvtr", machInst); + if (single) { + return new VcvtFpSIntS(machInst, vd, vm); + } else { + vd = (IntRegIndex)(bits(machInst, 22) | + (bits(machInst, 15, 12) << 1)); + return new VcvtFpSIntD(machInst, vd, vm); + } case 0xe: case 0xf: // Between FP and fixed point. |