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| author | Andreas Hansson <andreas.hansson@arm.com> | 2014-10-01 08:05:51 -0400 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2014-10-01 08:05:51 -0400 |
| commit | 10f82934be924f265af4f10b15ca66106171f770 (patch) | |
| tree | e8e92c73422751d4ee26c3b87ceae204fa520751 /src/arch/arm/isa/formats | |
| parent | ff2d58f935c434e89a499474d3bda76f476e6d25 (diff) | |
| download | gem5-10f82934be924f265af4f10b15ca66106171f770.tar.xz | |
arm: More UBSan cleanups after additional full-system runs
Some incorrect casting to IntRegIndex, and a few uninitialized members
in the i8254xGBe device.
Diffstat (limited to 'src/arch/arm/isa/formats')
| -rw-r--r-- | src/arch/arm/isa/formats/misc.isa | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/arm/isa/formats/misc.isa b/src/arch/arm/isa/formats/misc.isa index 7d3865104..925ed55cd 100644 --- a/src/arch/arm/isa/formats/misc.isa +++ b/src/arch/arm/isa/formats/misc.isa @@ -274,8 +274,8 @@ let {{ uint32_t iss = mcrrMrrcIssBuild(isRead, crm, rt, rt2, opc1); if (isRead) - return new Mrrc15(machInst, (IntRegIndex) miscReg, rt2, rt, iss); - return new Mcrr15(machInst, rt2, rt, (IntRegIndex) miscReg, iss); + return new Mrrc15(machInst, miscReg, rt2, rt, iss); + return new Mcrr15(machInst, rt2, rt, miscReg, iss); } else { return new FailUnimplemented(isRead ? "mrrc" : "mcrr", machInst, csprintf("%s %s", |