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authorGabe Black <gblack@eecs.umich.edu>2011-11-02 01:25:15 -0700
committerGabe Black <gblack@eecs.umich.edu>2011-11-02 01:25:15 -0700
commit239b33e016b19aa18e70f3bc64c4e11de3f92c7d (patch)
tree87008a6ac9437f57bb9a33b240603fe090b4b0ab /src/arch/arm/isa/formats
parent7b417d4188c4978ecdeddd04a0b53f60b96d22e1 (diff)
downloadgem5-239b33e016b19aa18e70f3bc64c4e11de3f92c7d.tar.xz
SE/FS: Get rid of FULL_SYSTEM in the ARM ISA.
Diffstat (limited to 'src/arch/arm/isa/formats')
-rw-r--r--src/arch/arm/isa/formats/data.isa2
-rw-r--r--src/arch/arm/isa/formats/m5ops.isa8
-rw-r--r--src/arch/arm/isa/formats/unimp.isa9
3 files changed, 4 insertions, 15 deletions
diff --git a/src/arch/arm/isa/formats/data.isa b/src/arch/arm/isa/formats/data.isa
index 03a585001..ffe5f45e3 100644
--- a/src/arch/arm/isa/formats/data.isa
+++ b/src/arch/arm/isa/formats/data.isa
@@ -1103,7 +1103,6 @@ def format ArmMisc() {{
switch (IMM) {
case 0x0:
return new NopInst(machInst);
-#if FULL_SYSTEM
case 0x1:
return new YieldInst(machInst);
case 0x2:
@@ -1112,7 +1111,6 @@ def format ArmMisc() {{
return new WfiInst(machInst);
case 0x4:
return new SevInst(machInst);
-#endif
default:
return new Unknown(machInst);
}
diff --git a/src/arch/arm/isa/formats/m5ops.isa b/src/arch/arm/isa/formats/m5ops.isa
index f532d828b..3b08acad7 100644
--- a/src/arch/arm/isa/formats/m5ops.isa
+++ b/src/arch/arm/isa/formats/m5ops.isa
@@ -42,35 +42,27 @@ def format M5ops() {{
{
const uint32_t m5func = bits(machInst, 23, 16);
switch(m5func) {
-#if FULL_SYSTEM
case 0x00: return new Arm(machInst);
case 0x01: return new Quiesce(machInst);
case 0x02: return new QuiesceNs(machInst);
case 0x03: return new QuiesceCycles(machInst);
case 0x04: return new QuiesceTime(machInst);
-#endif
case 0x07: return new Rpns(machInst);
case 0x09: return new WakeCPU(machInst);
case 0x10: return new Deprecated_ivlb(machInst);
case 0x11: return new Deprecated_ivle(machInst);
case 0x20: return new Deprecated_exit (machInst);
case 0x21: return new M5exit(machInst);
-#if FULL_SYSTEM
case 0x31: return new Loadsymbol(machInst);
case 0x30: return new Initparam(machInst);
-#endif
case 0x40: return new Resetstats(machInst);
case 0x41: return new Dumpstats(machInst);
case 0x42: return new Dumpresetstats(machInst);
case 0x43: return new M5checkpoint(machInst);
-#if FULL_SYSTEM
case 0x50: return new M5readfile(machInst);
-#endif
case 0x51: return new M5break(machInst);
case 0x52: return new M5switchcpu(machInst);
-#if FULL_SYSTEM
case 0x53: return new M5addsymbol(machInst);
-#endif
case 0x54: return new M5panic(machInst);
case 0x5a: return new M5workbegin(machInst);
case 0x5b: return new M5workend(machInst);
diff --git a/src/arch/arm/isa/formats/unimp.isa b/src/arch/arm/isa/formats/unimp.isa
index a0e0afd32..1c9a4b402 100644
--- a/src/arch/arm/isa/formats/unimp.isa
+++ b/src/arch/arm/isa/formats/unimp.isa
@@ -147,11 +147,10 @@ output exec {{
FailUnimplemented::execute(%(CPU_exec_context)s *xc,
Trace::InstRecord *traceData) const
{
-#if FULL_SYSTEM
- return new UndefinedInstruction;
-#else
- return new UndefinedInstruction(machInst, false, mnemonic);
-#endif
+ if (FullSystem)
+ return new UndefinedInstruction;
+ else
+ return new UndefinedInstruction(machInst, false, mnemonic);
}
Fault