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| author | Edmund Grimley Evans <Edmund.Grimley-Evans@arm.com> | 2018-06-28 14:32:01 +0100 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2018-10-02 14:10:50 +0000 |
| commit | 352d666fa1e9b5ae960127c95d19cf63c8ff0df7 (patch) | |
| tree | 60fe09123ff1da0192b53fd36a6623d880b5509c /src/arch/arm/isa/formats | |
| parent | 9c687a6f70a7b88b8e8c125421c5f5e765b928a5 (diff) | |
| download | gem5-352d666fa1e9b5ae960127c95d19cf63c8ff0df7.tar.xz | |
arch-arm: Add FP16 support introduced by Armv8.2-A
This changeset adds support for FP/SIMD instructions with
half-precision floating-point operands.
Change-Id: I4957f111c9c5e5d6a3747fe9d169d394d642fee8
Signed-off-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/13084
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch/arm/isa/formats')
| -rw-r--r-- | src/arch/arm/isa/formats/aarch64.isa | 6 | ||||
| -rw-r--r-- | src/arch/arm/isa/formats/fp.isa | 6 |
2 files changed, 7 insertions, 5 deletions
diff --git a/src/arch/arm/isa/formats/aarch64.isa b/src/arch/arm/isa/formats/aarch64.isa index 43dd557aa..77e598c7f 100644 --- a/src/arch/arm/isa/formats/aarch64.isa +++ b/src/arch/arm/isa/formats/aarch64.isa @@ -1637,12 +1637,14 @@ namespace Aarch64 if (type == 0) { // FMOV S[d] = imm8<7>:NOT(imm8<6>):Replicate(imm8<6>,5) // :imm8<5:0>:Zeros(19) - uint32_t imm = vfp_modified_imm(imm8, false); + uint32_t imm = vfp_modified_imm(imm8, + FpDataType::Fp32); return new FmovImmS(machInst, rd, imm); } else if (type == 1) { // FMOV D[d] = imm8<7>:NOT(imm8<6>):Replicate(imm8<6>,8) // :imm8<5:0>:Zeros(48) - uint64_t imm = vfp_modified_imm(imm8, true); + uint64_t imm = vfp_modified_imm(imm8, + FpDataType::Fp64); return new FmovImmD(machInst, rd, imm); } else { return new Unknown64(machInst); diff --git a/src/arch/arm/isa/formats/fp.isa b/src/arch/arm/isa/formats/fp.isa index 009b27c8f..2412a1f10 100644 --- a/src/arch/arm/isa/formats/fp.isa +++ b/src/arch/arm/isa/formats/fp.isa @@ -1,6 +1,6 @@ // -*- mode:c++ -*- -// Copyright (c) 2010-2011,2016 ARM Limited +// Copyright (c) 2010-2011, 2016-2018 ARM Limited // All rights reserved // // The license below extends only to copyright in the software and shall @@ -2401,11 +2401,11 @@ let {{ const uint32_t baseImm = bits(machInst, 3, 0) | (bits(machInst, 19, 16) << 4); if (single) { - uint32_t imm = vfp_modified_imm(baseImm, false); + uint32_t imm = vfp_modified_imm(baseImm, FpDataType::Fp32); return decodeVfpRegImmOp<VmovImmS>( machInst, vd, imm, false); } else { - uint64_t imm = vfp_modified_imm(baseImm, true); + uint64_t imm = vfp_modified_imm(baseImm, FpDataType::Fp64); return decodeVfpRegImmOp<VmovImmD>( machInst, vd, imm, true); } |