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| author | Gedare Bloom <gedare@gwmail.gwu.edu> | 2011-06-17 12:20:10 -0500 |
|---|---|---|
| committer | Gedare Bloom <gedare@gwmail.gwu.edu> | 2011-06-17 12:20:10 -0500 |
| commit | 3f1f16703d7d7fafb29fb47415b9aa959fb8eda7 (patch) | |
| tree | bd3d9493221af378095342a3f8c219fd69739499 /src/arch/arm/isa/formats | |
| parent | 8b4307f8d863b1805ec0e282bccda23ff4863f16 (diff) | |
| download | gem5-3f1f16703d7d7fafb29fb47415b9aa959fb8eda7.tar.xz | |
ARM: Add m5ops and related support for workbegin() and workend() to ARM ISA.
Diffstat (limited to 'src/arch/arm/isa/formats')
| -rw-r--r-- | src/arch/arm/isa/formats/m5ops.isa | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/arch/arm/isa/formats/m5ops.isa b/src/arch/arm/isa/formats/m5ops.isa index 2f5fe2c3a..f532d828b 100644 --- a/src/arch/arm/isa/formats/m5ops.isa +++ b/src/arch/arm/isa/formats/m5ops.isa @@ -72,6 +72,8 @@ def format M5ops() {{ case 0x53: return new M5addsymbol(machInst); #endif case 0x54: return new M5panic(machInst); + case 0x5a: return new M5workbegin(machInst); + case 0x5b: return new M5workend(machInst); } } ''' |