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authorGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:14 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:14 -0500
commit41012d2418fd355f15488131cc95ee8e4a6302f8 (patch)
treee95845667028480540cf16b60d45a1a56072cd19 /src/arch/arm/isa/formats
parenta430f749cefb75f58d1d1c9692e2b53f1f5252bf (diff)
downloadgem5-41012d2418fd355f15488131cc95ee8e4a6302f8.tar.xz
ARM: Implement VCVT between double and single width FP.
Diffstat (limited to 'src/arch/arm/isa/formats')
-rw-r--r--src/arch/arm/isa/formats/fp.isa11
1 files changed, 9 insertions, 2 deletions
diff --git a/src/arch/arm/isa/formats/fp.isa b/src/arch/arm/isa/formats/fp.isa
index 47703a7a0..e92757096 100644
--- a/src/arch/arm/isa/formats/fp.isa
+++ b/src/arch/arm/isa/formats/fp.isa
@@ -616,8 +616,15 @@ let {{
return new WarnUnimplemented("vcmp, vcmpe", machInst);
case 0x7:
if (opc3 == 0x3) {
- // Between double and single precision.
- return new WarnUnimplemented("vcvt", machInst);
+ if (single) {
+ vm = (IntRegIndex)(bits(machInst, 5) |
+ (bits(machInst, 3, 0) << 1));
+ return new VcvtFpSFpD(machInst, vd, vm);
+ } else {
+ vd = (IntRegIndex)(bits(machInst, 22) |
+ (bits(machInst, 15, 12) << 1));
+ return new VcvtFpDFpS(machInst, vd, vm);
+ }
}
break;
case 0x8: