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| author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-02-14 17:45:38 +0000 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-02-20 13:30:02 +0000 |
| commit | 803a8db53aae57d42bd2465c9284df91ed5e7641 (patch) | |
| tree | ffbc793bf70c643e6f1f686eb5cd8188737000c5 /src/arch/arm/isa/formats | |
| parent | a3bb33b257324ad9da3e656e30ba61e6f4b5497f (diff) | |
| download | gem5-803a8db53aae57d42bd2465c9284df91ed5e7641.tar.xz | |
arch-arm: Fix Hlt64,Svc64,Hvc64,Smc64,Brk64 disassembly
This patch fixes the disassembly of AArch64 Exception Generating
instructions, which were not printing the encoded immediate field. This
has been accomplished by changing their underlying type to a newly
defined one.
Change-Id: If58ae3e620d2baa260e12ecdc850225adfcf1ee5
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/8368
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch/arm/isa/formats')
| -rw-r--r-- | src/arch/arm/isa/formats/aarch64.isa | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/src/arch/arm/isa/formats/aarch64.isa b/src/arch/arm/isa/formats/aarch64.isa index f39a1a5b9..68f600698 100644 --- a/src/arch/arm/isa/formats/aarch64.isa +++ b/src/arch/arm/isa/formats/aarch64.isa @@ -242,21 +242,25 @@ namespace Aarch64 (ConditionCode)(uint8_t)(bits(machInst, 3, 0)); return new BCond64(machInst, imm, condCode); } else if (bits(machInst, 25, 24) == 0x0) { + if (bits(machInst, 4, 2)) return new Unknown64(machInst); + + auto imm16 = bits(machInst, 20, 5); uint8_t decVal = (bits(machInst, 1, 0) << 0) | (bits(machInst, 23, 21) << 2); + switch (decVal) { case 0x01: - return new Svc64(machInst); + return new Svc64(machInst, imm16); case 0x02: - return new Hvc64(machInst); + return new Hvc64(machInst, imm16); case 0x03: - return new Smc64(machInst); + return new Smc64(machInst, imm16); case 0x04: - return new Brk64(machInst); + return new Brk64(machInst, imm16); case 0x08: - return new Hlt64(machInst); + return new Hlt64(machInst, imm16); case 0x15: return new FailUnimplemented("dcps1", machInst); case 0x16: |