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authorGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:14 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:14 -0500
commitcd0a6a1303d204bd9c594e40c71ad67adb0cd092 (patch)
treefc4ec4ce44f14623ffd939b980f61c7cf100130a /src/arch/arm/isa/formats
parent65f5204325f22ae8cc2b42da5ef046c55acf2a9d (diff)
downloadgem5-cd0a6a1303d204bd9c594e40c71ad67adb0cd092.tar.xz
ARM: Implement the VFP version of vneg.
Diffstat (limited to 'src/arch/arm/isa/formats')
-rw-r--r--src/arch/arm/isa/formats/fp.isa16
1 files changed, 15 insertions, 1 deletions
diff --git a/src/arch/arm/isa/formats/fp.isa b/src/arch/arm/isa/formats/fp.isa
index 2222b1e62..080174318 100644
--- a/src/arch/arm/isa/formats/fp.isa
+++ b/src/arch/arm/isa/formats/fp.isa
@@ -558,7 +558,21 @@ let {{
}
case 0x1:
if (opc3 == 1) {
- return new WarnUnimplemented("vneg", machInst);
+ uint32_t vd;
+ uint32_t vm;
+ if (bits(machInst, 8) == 0) {
+ vd = bits(machInst, 22) | (bits(machInst, 15, 12) << 1);
+ vm = bits(machInst, 5) | (bits(machInst, 3, 0) << 1);
+ return new VnegS(machInst,
+ (IntRegIndex)vd, (IntRegIndex)vm);
+ } else {
+ vd = (bits(machInst, 22) << 5) |
+ (bits(machInst, 15, 12) << 1);
+ vm = (bits(machInst, 5) << 5) |
+ (bits(machInst, 3, 0) << 1);
+ return new VnegD(machInst,
+ (IntRegIndex)vd, (IntRegIndex)vm);
+ }
} else {
return new WarnUnimplemented("vsqrt", machInst);
}