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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:06 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:06 -0500 |
| commit | be888e67e71ac2ce6b6c265c5652435f682970c6 (patch) | |
| tree | 2e7fe0dbbe45437056e47052f331a34388c3e0a1 /src/arch/arm/isa/insts/data.isa | |
| parent | 5495ebd68d10e9472543dcd9c95e8b5a7a58a36b (diff) | |
| download | gem5-be888e67e71ac2ce6b6c265c5652435f682970c6.tar.xz | |
ARM: Implement the unsigned saturating instructions.
Diffstat (limited to 'src/arch/arm/isa/insts/data.isa')
| -rw-r--r-- | src/arch/arm/isa/insts/data.isa | 73 |
1 files changed, 73 insertions, 0 deletions
diff --git a/src/arch/arm/isa/insts/data.isa b/src/arch/arm/isa/insts/data.isa index 206c218e1..04e62f27b 100644 --- a/src/arch/arm/isa/insts/data.isa +++ b/src/arch/arm/isa/insts/data.isa @@ -428,4 +428,77 @@ let {{ Dest = resTemp; resTemp = geBits; ''', flagType="ge", buildNonCc=False) + + buildRegDataInst("uqadd16", ''' + uint32_t midRes; + for (unsigned i = 0; i < 2; i++) { + int high = (i + 1) * 16 - 1; + int low = i * 16; + uint64_t arg1 = bits(Op1, high, low); + uint64_t arg2 = bits(Op2, high, low); + uSaturateOp<16>(midRes, arg1, arg2); + replaceBits(resTemp, high, low, midRes); + } + Dest = resTemp; + ''', flagType="none", buildCc=False) + buildRegDataInst("uqadd8", ''' + uint32_t midRes; + for (unsigned i = 0; i < 4; i++) { + int high = (i + 1) * 8 - 1; + int low = i * 8; + uint64_t arg1 = bits(Op1, high, low); + uint64_t arg2 = bits(Op2, high, low); + uSaturateOp<8>(midRes, arg1, arg2); + replaceBits(resTemp, high, low, midRes); + } + Dest = resTemp; + ''', flagType="none", buildCc=False) + buildRegDataInst("uqsub16", ''' + uint32_t midRes; + for (unsigned i = 0; i < 2; i++) { + int high = (i + 1) * 16 - 1; + int low = i * 16; + uint64_t arg1 = bits(Op1, high, low); + uint64_t arg2 = bits(Op2, high, low); + uSaturateOp<16>(midRes, arg1, arg2, true); + replaceBits(resTemp, high, low, midRes); + } + Dest = resTemp; + ''', flagType="none", buildCc=False) + buildRegDataInst("uqsub8", ''' + uint32_t midRes; + for (unsigned i = 0; i < 4; i++) { + int high = (i + 1) * 8 - 1; + int low = i * 8; + uint64_t arg1 = bits(Op1, high, low); + uint64_t arg2 = bits(Op2, high, low); + uSaturateOp<8>(midRes, arg1, arg2, true); + replaceBits(resTemp, high, low, midRes); + } + Dest = resTemp; + ''', flagType="none", buildCc=False) + buildRegDataInst("uqasx", ''' + uint32_t midRes; + uint64_t arg1Low = bits(Op1.sw, 15, 0); + uint64_t arg1High = bits(Op1.sw, 31, 16); + uint64_t arg2Low = bits(Op2.sw, 15, 0); + uint64_t arg2High = bits(Op2.sw, 31, 16); + uSaturateOp<16>(midRes, arg1Low, arg2High, true); + replaceBits(resTemp, 15, 0, midRes); + uSaturateOp<16>(midRes, arg1High, arg2Low); + replaceBits(resTemp, 31, 16, midRes); + Dest = resTemp; + ''', flagType="none", buildCc=False) + buildRegDataInst("uqsax", ''' + uint32_t midRes; + uint64_t arg1Low = bits(Op1.sw, 15, 0); + uint64_t arg1High = bits(Op1.sw, 31, 16); + uint64_t arg2Low = bits(Op2.sw, 15, 0); + uint64_t arg2High = bits(Op2.sw, 31, 16); + uSaturateOp<16>(midRes, arg1Low, arg2High); + replaceBits(resTemp, 15, 0, midRes); + uSaturateOp<16>(midRes, arg1High, arg2Low, true); + replaceBits(resTemp, 31, 16, midRes); + Dest = resTemp; + ''', flagType="none", buildCc=False) }}; |