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| author | Gabe Black <gblack@eecs.umich.edu> | 2011-11-02 01:25:15 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2011-11-02 01:25:15 -0700 |
| commit | 239b33e016b19aa18e70f3bc64c4e11de3f92c7d (patch) | |
| tree | 87008a6ac9437f57bb9a33b240603fe090b4b0ab /src/arch/arm/isa/insts/div.isa | |
| parent | 7b417d4188c4978ecdeddd04a0b53f60b96d22e1 (diff) | |
| download | gem5-239b33e016b19aa18e70f3bc64c4e11de3f92c7d.tar.xz | |
SE/FS: Get rid of FULL_SYSTEM in the ARM ISA.
Diffstat (limited to 'src/arch/arm/isa/insts/div.isa')
| -rw-r--r-- | src/arch/arm/isa/insts/div.isa | 18 |
1 files changed, 8 insertions, 10 deletions
diff --git a/src/arch/arm/isa/insts/div.isa b/src/arch/arm/isa/insts/div.isa index 8a94d1ebd..1ff6ef9e4 100644 --- a/src/arch/arm/isa/insts/div.isa +++ b/src/arch/arm/isa/insts/div.isa @@ -41,11 +41,10 @@ let {{ sdivCode = ''' if (Op2_sw == 0) { if (((SCTLR)Sctlr).dz) { -#if FULL_SYSTEM - return new UndefinedInstruction; -#else - return new UndefinedInstruction(false, mnemonic); -#endif + if (FullSystem) + return new UndefinedInstruction; + else + return new UndefinedInstruction(false, mnemonic); } Dest_sw = 0; } else if (Op1_sw == INT_MIN && Op2_sw == -1) { @@ -65,11 +64,10 @@ let {{ udivCode = ''' if (Op2_uw == 0) { if (((SCTLR)Sctlr).dz) { -#if FULL_SYSTEM - return new UndefinedInstruction; -#else - return new UndefinedInstruction(false, mnemonic); -#endif + if (FullSystem) + return new UndefinedInstruction; + else + return new UndefinedInstruction(false, mnemonic); } Dest_uw = 0; } else { |