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| author | Ali Saidi <ali.saidi@arm.com> | 2010-08-25 19:10:42 -0500 |
|---|---|---|
| committer | Ali Saidi <ali.saidi@arm.com> | 2010-08-25 19:10:42 -0500 |
| commit | 99fafb72b87f3b63f205bee7b20b8c19724d6305 (patch) | |
| tree | 305127cadcae96140871d128525bc89c5a1486ec /src/arch/arm/isa/insts/macromem.isa | |
| parent | 63464d950ec4e8b8f3aa86802ca9fbf1e8c662b6 (diff) | |
| download | gem5-99fafb72b87f3b63f205bee7b20b8c19724d6305.tar.xz | |
ARM: Fix VFP enabled checks for mem instructions
Diffstat (limited to 'src/arch/arm/isa/insts/macromem.isa')
| -rw-r--r-- | src/arch/arm/isa/insts/macromem.isa | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/src/arch/arm/isa/insts/macromem.isa b/src/arch/arm/isa/insts/macromem.isa index 652a929f1..bcb1e26b8 100644 --- a/src/arch/arm/isa/insts/macromem.isa +++ b/src/arch/arm/isa/insts/macromem.isa @@ -59,7 +59,7 @@ let {{ microLdrFpUopIop = InstObjParams('ldrfp_uop', 'MicroLdrFpUop', 'MicroMemOp', {'memacc_code': microLdrFpUopCode, - 'ea_code': + 'ea_code': vfpEnabledCheckCode + 'EA = Rb + (up ? imm : -imm);', 'predicate_test': predicateTest}, ['IsMicroop']) @@ -68,7 +68,7 @@ let {{ microLdrDBFpUopIop = InstObjParams('ldrfp_uop', 'MicroLdrDBFpUop', 'MicroMemOp', {'memacc_code': microLdrFpUopCode, - 'ea_code': ''' + 'ea_code': vfpEnabledCheckCode + ''' EA = Rb + (up ? imm : -imm) + (((CPSR)Cpsr).e ? 4 : 0); ''', @@ -79,7 +79,7 @@ let {{ microLdrDTFpUopIop = InstObjParams('ldrfp_uop', 'MicroLdrDTFpUop', 'MicroMemOp', {'memacc_code': microLdrFpUopCode, - 'ea_code': ''' + 'ea_code': vfpEnabledCheckCode + ''' EA = Rb + (up ? imm : -imm) - (((CPSR)Cpsr).e ? 4 : 0); ''', @@ -117,7 +117,8 @@ let {{ 'MicroMemOp', {'memacc_code': microStrFpUopCode, 'postacc_code': "", - 'ea_code': 'EA = Rb + (up ? imm : -imm);', + 'ea_code': vfpEnabledCheckCode + + 'EA = Rb + (up ? imm : -imm);', 'predicate_test': predicateTest}, ['IsMicroop']) @@ -126,7 +127,7 @@ let {{ 'MicroMemOp', {'memacc_code': microStrFpUopCode, 'postacc_code': "", - 'ea_code': ''' + 'ea_code': vfpEnabledCheckCode + ''' EA = Rb + (up ? imm : -imm) + (((CPSR)Cpsr).e ? 4 : 0); ''', @@ -138,7 +139,7 @@ let {{ 'MicroMemOp', {'memacc_code': microStrFpUopCode, 'postacc_code': "", - 'ea_code': ''' + 'ea_code': vfpEnabledCheckCode + ''' EA = Rb + (up ? imm : -imm) - (((CPSR)Cpsr).e ? 4 : 0); ''', @@ -222,7 +223,7 @@ let {{ { 'mem_decl' : memDecl, 'size' : size, 'memacc_code' : loadMemAccCode, - 'ea_code' : eaCode, + 'ea_code' : simdEnabledCheckCode + eaCode, 'predicate_test' : predicateTest }, [ 'IsMicroop', 'IsMemRef', 'IsLoad' ]) storeIop = InstObjParams('strneon%(size)d_uop' % subst, @@ -231,7 +232,7 @@ let {{ { 'mem_decl' : memDecl, 'size' : size, 'memacc_code' : storeMemAccCode, - 'ea_code' : eaCode, + 'ea_code' : simdEnabledCheckCode + eaCode, 'predicate_test' : predicateTest }, [ 'IsMicroop', 'IsMemRef', 'IsStore' ]) |