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authorGabe Black <gblack@eecs.umich.edu>2012-01-07 02:10:34 -0800
committerGabe Black <gblack@eecs.umich.edu>2012-01-07 02:10:34 -0800
commit36a822f08e88483b41af214ace4fd3dccf3aa8cb (patch)
treed7c4c08590459d967a1d7638b02c586911826953 /src/arch/arm/isa/insts/macromem.isa
parent85424bef192c02a47c0d46c2d99ac0a5d6e55a99 (diff)
parentf171a29118e1d80c04c72d2fb5f024fed4fb62af (diff)
downloadgem5-36a822f08e88483b41af214ace4fd3dccf3aa8cb.tar.xz
Merge with main repository.
Diffstat (limited to 'src/arch/arm/isa/insts/macromem.isa')
-rw-r--r--src/arch/arm/isa/insts/macromem.isa7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/arch/arm/isa/insts/macromem.isa b/src/arch/arm/isa/insts/macromem.isa
index 815d4c258..db36a3fff 100644
--- a/src/arch/arm/isa/insts/macromem.isa
+++ b/src/arch/arm/isa/insts/macromem.isa
@@ -563,15 +563,16 @@ let {{
let {{
exec_output = ''
- for type in ('uint8_t', 'uint16_t', 'uint32_t'):
+ for typeSize in (8, 16, 32):
for sRegs in 1, 2:
- for dRegs in range(sRegs, 5):
+ for dRegs in range(sRegs, min(sRegs * 64 / typeSize + 1, 5)):
for format in ("MicroUnpackNeon%(sRegs)dto%(dRegs)dUop",
"MicroUnpackAllNeon%(sRegs)dto%(dRegs)dUop",
"MicroPackNeon%(dRegs)dto%(sRegs)dUop"):
Name = format % { "sRegs" : sRegs * 2,
"dRegs" : dRegs * 2 }
- substDict = { "class_name" : Name, "targs" : type }
+ substDict = { "class_name" : Name,
+ "targs" : "uint%d_t" % typeSize }
exec_output += MicroNeonExecDeclare.subst(substDict)
}};