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| author | Gedare Bloom <gedare@rtems.org> | 2017-05-24 18:35:50 -0400 |
|---|---|---|
| committer | Gedare Bloom <gedare@rtems.org> | 2017-07-13 16:39:17 +0000 |
| commit | c473bdb8916528be4ff896c5e9378e6200f68939 (patch) | |
| tree | 864c63152be19a795889bb3bcd5e48786028cf49 /src/arch/arm/isa/insts/macromem.isa | |
| parent | fc575f8266149c78b29bcbe12ab86ccb7614ffbf (diff) | |
| download | gem5-c473bdb8916528be4ff896c5e9378e6200f68939.tar.xz | |
arch-arm: fix ldm of pc interswitching branch
The LDM instruction that loads to the PC causes a branch to the
instruction. In ARMv5T+ the branch can interswitch Thumb and ARM modes.
The interswitch is broken prior to this commit, with LDM to the PC
ignoring the switch.
Change-Id: I6aad073206743f3435c9923e3e2218bfe32c7e05
Reviewed-on: https://gem5-review.googlesource.com/3520
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch/arm/isa/insts/macromem.isa')
| -rw-r--r-- | src/arch/arm/isa/insts/macromem.isa | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/arch/arm/isa/insts/macromem.isa b/src/arch/arm/isa/insts/macromem.isa index cc7366e2b..6a33d1b9f 100644 --- a/src/arch/arm/isa/insts/macromem.isa +++ b/src/arch/arm/isa/insts/macromem.isa @@ -58,7 +58,8 @@ let {{ microLdr2UopCode = ''' uint64_t data = Mem_ud; Dest = cSwap((uint32_t) data, ((CPSR)Cpsr).e); - Dest2 = cSwap((uint32_t) (data >> 32), ((CPSR)Cpsr).e); + IWDest2 = cSwap((uint32_t) (data >> 32), + ((CPSR)Cpsr).e); ''' microLdr2UopIop = InstObjParams('ldr2_uop', 'MicroLdr2Uop', 'MicroMemPairOp', |