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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:04 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:04 -0500 |
| commit | cb631d87c3cb676e9d25c3ffbcd76580a3393b05 (patch) | |
| tree | f989be2064764f91d99cbd44c6a6e5e8cbaddd7d /src/arch/arm/isa/insts/macromem.isa | |
| parent | 3a11412c995f462b9fc7eb7b688cb7d7e0011680 (diff) | |
| download | gem5-cb631d87c3cb676e9d25c3ffbcd76580a3393b05.tar.xz | |
ARM: Add floating point load/store microops.
Diffstat (limited to 'src/arch/arm/isa/insts/macromem.isa')
| -rw-r--r-- | src/arch/arm/isa/insts/macromem.isa | 44 |
1 files changed, 29 insertions, 15 deletions
diff --git a/src/arch/arm/isa/insts/macromem.isa b/src/arch/arm/isa/insts/macromem.isa index 0f07a87c4..0a593cf00 100644 --- a/src/arch/arm/isa/insts/macromem.isa +++ b/src/arch/arm/isa/insts/macromem.isa @@ -58,6 +58,13 @@ let {{ 'predicate_test': predicateTest}, ['IsMicroop']) + microLdrFpUopIop = InstObjParams('ldrfp_uop', 'MicroLdrFpUop', + 'MicroMemOp', + {'memacc_code': 'Fa = Mem;', + 'ea_code': 'EA = Rb + (up ? imm : -imm);', + 'predicate_test': predicateTest}, + ['IsMicroop']) + microLdrRetUopCode = ''' Ra = Mem; uint32_t newCpsr = @@ -80,21 +87,28 @@ let {{ 'predicate_test': predicateTest}, ['IsMicroop']) - header_output = MicroMemDeclare.subst(microLdrUopIop) + \ - MicroMemDeclare.subst(microLdrRetUopIop) + \ - MicroMemDeclare.subst(microStrUopIop) - decoder_output = MicroMemConstructor.subst(microLdrUopIop) + \ - MicroMemConstructor.subst(microLdrRetUopIop) + \ - MicroMemConstructor.subst(microStrUopIop) - exec_output = LoadExecute.subst(microLdrUopIop) + \ - LoadExecute.subst(microLdrRetUopIop) + \ - StoreExecute.subst(microStrUopIop) + \ - LoadInitiateAcc.subst(microLdrUopIop) + \ - LoadInitiateAcc.subst(microLdrRetUopIop) + \ - StoreInitiateAcc.subst(microStrUopIop) + \ - LoadCompleteAcc.subst(microLdrUopIop) + \ - LoadCompleteAcc.subst(microLdrRetUopIop) + \ - StoreCompleteAcc.subst(microStrUopIop) + microStrFpUopIop = InstObjParams('strfp_uop', 'MicroStrFpUop', + 'MicroMemOp', + {'memacc_code': 'Mem = Fa;', + 'ea_code': 'EA = Rb + (up ? imm : -imm);', + 'predicate_test': predicateTest}, + ['IsMicroop']) + + header_output = decoder_output = exec_output = '' + + loadIops = (microLdrUopIop, microLdrFpUopIop, microLdrRetUopIop) + storeIops = (microStrUopIop, microStrFpUopIop) + for iop in loadIops + storeIops: + header_output += MicroMemDeclare.subst(iop) + decoder_output += MicroMemConstructor.subst(iop) + for iop in loadIops: + exec_output += LoadExecute.subst(iop) + \ + LoadInitiateAcc.subst(iop) + \ + LoadCompleteAcc.subst(iop) + for iop in storeIops: + exec_output += StoreExecute.subst(iop) + \ + StoreInitiateAcc.subst(iop) + \ + StoreCompleteAcc.subst(iop) }}; //////////////////////////////////////////////////////////////////// |