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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-12-09 14:45:17 -0800 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-12-09 14:45:17 -0800 |
| commit | 2ff3e6b399796a182b3c9cb68f021d1f533356e4 (patch) | |
| tree | 157f0930a9047292cf0d0a2e64de8425b23559ed /src/arch/arm/isa/insts/macromem.isa | |
| parent | 24c5b5925d0bc724a9c6f3f4582def33e113ccf0 (diff) | |
| download | gem5-2ff3e6b399796a182b3c9cb68f021d1f533356e4.tar.xz | |
ARM: Take advantage of new PCState syntax.
Diffstat (limited to 'src/arch/arm/isa/insts/macromem.isa')
| -rw-r--r-- | src/arch/arm/isa/insts/macromem.isa | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/arch/arm/isa/insts/macromem.isa b/src/arch/arm/isa/insts/macromem.isa index a81050b1e..6bf789efd 100644 --- a/src/arch/arm/isa/insts/macromem.isa +++ b/src/arch/arm/isa/insts/macromem.isa @@ -93,9 +93,7 @@ let {{ cpsrWriteByInstr(cpsr | CondCodes, Spsr, 0xF, true, sctlr.nmfi); Cpsr = ~CondCodesMask & newCpsr; CondCodes = CondCodesMask & newCpsr; - ArmISA::PCState pc = PCS; - pc.instIWNPC(cSwap(Mem.uw, cpsr.e) | ((Spsr & 0x20) ? 1 : 0)); - PCS = pc; + IWNPC = cSwap(Mem.uw, cpsr.e) | ((Spsr & 0x20) ? 1 : 0); ''' microLdrRetUopIop = InstObjParams('ldr_ret_uop', 'MicroLdrRetUop', 'MicroMemOp', |