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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:10 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:10 -0500 |
| commit | faf6c727f6f206238eb6cbd4f6c84f6136c739a2 (patch) | |
| tree | b1f0149a9a310b058bcf17d1b03cd5001f1100e2 /src/arch/arm/isa/insts/macromem.isa | |
| parent | b6cb6f1874184c72bcf97e7156c5c650be85a7fe (diff) | |
| download | gem5-faf6c727f6f206238eb6cbd4f6c84f6136c739a2.tar.xz | |
ARM: Respect the E bit of the CPSR when doing loads and stores.
Diffstat (limited to 'src/arch/arm/isa/insts/macromem.isa')
| -rw-r--r-- | src/arch/arm/isa/insts/macromem.isa | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/src/arch/arm/isa/insts/macromem.isa b/src/arch/arm/isa/insts/macromem.isa index 13eb70b39..f393c74f0 100644 --- a/src/arch/arm/isa/insts/macromem.isa +++ b/src/arch/arm/isa/insts/macromem.isa @@ -51,26 +51,29 @@ let {{ }}; let {{ + microLdrUopCode = "IWRa = cSwap(Mem.uw, ((CPSR)Cpsr).e);" microLdrUopIop = InstObjParams('ldr_uop', 'MicroLdrUop', 'MicroMemOp', - {'memacc_code': 'IWRa = Mem;', + {'memacc_code': microLdrUopCode, 'ea_code': 'EA = Rb + (up ? imm : -imm);', 'predicate_test': predicateTest}, ['IsMicroop']) + microLdrFpUopCode = "Fa = cSwap(Mem.uw, ((CPSR)Cpsr).e);" microLdrFpUopIop = InstObjParams('ldrfp_uop', 'MicroLdrFpUop', 'MicroMemOp', - {'memacc_code': 'Fa = Mem;', + {'memacc_code': microLdrFpUopCode, 'ea_code': 'EA = Rb + (up ? imm : -imm);', 'predicate_test': predicateTest}, ['IsMicroop']) microLdrRetUopCode = ''' + CPSR cpsr = Cpsr; uint32_t newCpsr = - cpsrWriteByInstr(Cpsr | CondCodes, Spsr, 0xF, true); + cpsrWriteByInstr(cpsr | CondCodes, Spsr, 0xF, true); Cpsr = ~CondCodesMask & newCpsr; CondCodes = CondCodesMask & newCpsr; - IWNPC = Mem | ((Spsr & 0x20) ? 1 : 0); + IWNPC = cSwap(Mem.uw, cpsr.e) | ((Spsr & 0x20) ? 1 : 0); ''' microLdrRetUopIop = InstObjParams('ldr_ret_uop', 'MicroLdrRetUop', 'MicroMemOp', @@ -80,16 +83,18 @@ let {{ 'predicate_test': predicateTest}, ['IsMicroop']) + microStrUopCode = "Mem = cSwap(Ra.uw, ((CPSR)Cpsr).e);" microStrUopIop = InstObjParams('str_uop', 'MicroStrUop', 'MicroMemOp', - {'memacc_code': 'Mem = Ra;', + {'memacc_code': microStrUopCode, 'ea_code': 'EA = Rb + (up ? imm : -imm);', 'predicate_test': predicateTest}, ['IsMicroop']) + microStrFpUopCode = "Mem = cSwap(Fa.uw, ((CPSR)Cpsr).e);" microStrFpUopIop = InstObjParams('strfp_uop', 'MicroStrFpUop', 'MicroMemOp', - {'memacc_code': 'Mem = Fa;', + {'memacc_code': microStrFpUopCode, 'ea_code': 'EA = Rb + (up ? imm : -imm);', 'predicate_test': predicateTest}, ['IsMicroop']) |