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author | Gene WU <gene.wu@arm.com> | 2010-08-25 19:10:42 -0500 |
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committer | Gene WU <gene.wu@arm.com> | 2010-08-25 19:10:42 -0500 |
commit | 4d8f4db8d135a23ceb5d54d3096e0598dd31e2fe (patch) | |
tree | dfc8029938e5580810c2a6b5cede6e72cf6f0524 /src/arch/arm/isa/insts/mem.isa | |
parent | c2d5d2b53d1d3bfb83ce0cf0332f81c4ffea112f (diff) | |
download | gem5-4d8f4db8d135a23ceb5d54d3096e0598dd31e2fe.tar.xz |
ARM: Use fewer micro-ops for register update loads if possible.
Allow some loads that update the base register to use just two micro-ops. three
micro-ops are only used if the destination register matches the offset register
or the PC is the destination regsiter. If the PC is updated it needs to be
the last micro-op otherwise O3 will mispredict.
Diffstat (limited to 'src/arch/arm/isa/insts/mem.isa')
-rw-r--r-- | src/arch/arm/isa/insts/mem.isa | 42 |
1 files changed, 33 insertions, 9 deletions
diff --git a/src/arch/arm/isa/insts/mem.isa b/src/arch/arm/isa/insts/mem.isa index aa47d5b7f..507f8cd4b 100644 --- a/src/arch/arm/isa/insts/mem.isa +++ b/src/arch/arm/isa/insts/mem.isa @@ -48,7 +48,7 @@ let {{ self.constructTemplate = eval(self.decConstBase + 'Constructor') def fillTemplates(self, name, Name, codeBlobs, memFlags, instFlags, - base = 'Memory'): + base = 'Memory', wbDecl = None): # Make sure flags are in lists (convert to lists if not). memFlags = makeList(memFlags) instFlags = makeList(instFlags) @@ -62,14 +62,38 @@ let {{ codeBlobs["ea_code"] = eaCode - iop = InstObjParams(name, Name, base, codeBlobs, instFlags) - - # (header_output, decoder_output, decode_block, exec_output) - return (self.declareTemplate.subst(iop), - self.constructTemplate.subst(iop), - self.fullExecTemplate.subst(iop) - + self.initiateAccTemplate.subst(iop) - + self.completeAccTemplate.subst(iop)) + macroName = Name + instFlagsCopy = list(instFlags) + codeBlobsCopy = dict(codeBlobs) + if wbDecl is not None: + instFlagsCopy.append('IsMicroop') + Name = Name + 'Acc' + codeBlobsCopy['acc_name'] = Name + codeBlobsCopy['wb_decl'] = wbDecl + codeBlobsCopy['use_uops'] = 0 + + iop = InstObjParams(name, Name, base, + codeBlobsCopy, instFlagsCopy) + + header_output = self.declareTemplate.subst(iop) + decoder_output = self.constructTemplate.subst(iop) + exec_output = self.fullExecTemplate.subst(iop) + \ + self.initiateAccTemplate.subst(iop) + \ + self.completeAccTemplate.subst(iop) + + if wbDecl is not None: + iop = InstObjParams(name, macroName, base, + { "wb_decl" : wbDecl, + "acc_name" : Name, + "use_uops" : 1 }, + ['IsMacroop']) + header_output += self.declareTemplate.subst(iop) + decoder_output += self.constructTemplate.subst(iop) + exec_output += PanicExecute.subst(iop) + \ + PanicInitiateAcc.subst(iop) + \ + PanicCompleteAcc.subst(iop) + + return (header_output, decoder_output, exec_output) def pickPredicate(blobs): for val in blobs.values(): |