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authorAli Saidi <Ali.Saidi@ARM.com>2011-04-04 11:42:27 -0500
committerAli Saidi <Ali.Saidi@ARM.com>2011-04-04 11:42:27 -0500
commitbe096f91b94ded36f43dd7d547a5671f99a264b1 (patch)
tree85442361558d1123c441538a173dabc9a3fa0a6c /src/arch/arm/isa/insts/mem.isa
parent55920a5ca73ded58762f1b7ae25c8cfe8c9e407d (diff)
downloadgem5-be096f91b94ded36f43dd7d547a5671f99a264b1.tar.xz
ARM: Tag appropriate instructions as IsReturn
Diffstat (limited to 'src/arch/arm/isa/insts/mem.isa')
-rw-r--r--src/arch/arm/isa/insts/mem.isa10
1 files changed, 8 insertions, 2 deletions
diff --git a/src/arch/arm/isa/insts/mem.isa b/src/arch/arm/isa/insts/mem.isa
index d0c0f0710..ca0d701d3 100644
--- a/src/arch/arm/isa/insts/mem.isa
+++ b/src/arch/arm/isa/insts/mem.isa
@@ -48,7 +48,8 @@ let {{
self.constructTemplate = eval(self.decConstBase + 'Constructor')
def fillTemplates(self, name, Name, codeBlobs, memFlags, instFlags,
- base = 'Memory', wbDecl = None, pcDecl = None):
+ base = 'Memory', wbDecl = None, pcDecl = None,
+ rasPop = False):
# Make sure flags are in lists (convert to lists if not).
memFlags = makeList(memFlags)
instFlags = makeList(instFlags)
@@ -85,6 +86,10 @@ let {{
codeBlobsCopy['use_uops'] = 0
codeBlobsCopy['use_wb'] = 0
codeBlobsCopy['use_pc'] = 0
+ is_ras_pop = "0"
+ if rasPop:
+ is_ras_pop = "1"
+ codeBlobsCopy['is_ras_pop'] = is_ras_pop
iop = InstObjParams(name, Name, base,
codeBlobsCopy, instFlagsCopy)
@@ -102,7 +107,8 @@ let {{
"acc_name" : Name,
"use_uops" : use_uops,
"use_pc" : use_pc,
- "use_wb" : use_wb },
+ "use_wb" : use_wb,
+ "is_ras_pop" : is_ras_pop },
['IsMacroop'])
header_output += self.declareTemplate.subst(iop)
decoder_output += self.constructTemplate.subst(iop)