summaryrefslogtreecommitdiff
path: root/src/arch/arm/isa/insts/misc.isa
diff options
context:
space:
mode:
authorAli Saidi <Ali.Saidi@ARM.com>2010-10-01 16:02:45 -0500
committerAli Saidi <Ali.Saidi@ARM.com>2010-10-01 16:02:45 -0500
commitb331b02669f95adf4744b1e7db50ad4b231fb704 (patch)
tree682fc56d99d2efd7fd45651ad6d1ee35560d19f1 /src/arch/arm/isa/insts/misc.isa
parentaef4a9904e0324b2aba2ddc212768d5b0c72b566 (diff)
downloadgem5-b331b02669f95adf4744b1e7db50ad4b231fb704.tar.xz
ARM: Clean up use of TBit and JBit.
Rather tha constantly using ULL(1) << PcXBitShift define those directly. Additionally, add some helper functions to further clean up the code.
Diffstat (limited to 'src/arch/arm/isa/insts/misc.isa')
-rw-r--r--src/arch/arm/isa/insts/misc.isa4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/arm/isa/insts/misc.isa b/src/arch/arm/isa/insts/misc.isa
index 089b7bc86..f2a80a111 100644
--- a/src/arch/arm/isa/insts/misc.isa
+++ b/src/arch/arm/isa/insts/misc.isa
@@ -638,7 +638,7 @@ let {{
exec_output += PredOpExecute.subst(mcr15UserIop)
enterxCode = '''
- FNPC = NPC | (1ULL << PcJBitShift) | (1ULL << PcTBitShift);
+ FNPC = NPC | PcJBit | PcTBit;
'''
enterxIop = InstObjParams("enterx", "Enterx", "PredOp",
{ "code": enterxCode,
@@ -648,7 +648,7 @@ let {{
exec_output += PredOpExecute.subst(enterxIop)
leavexCode = '''
- FNPC = (NPC & ~(1ULL << PcJBitShift)) | (1ULL << PcTBitShift);
+ FNPC = (NPC & ~PcJBit) | PcTBit;
'''
leavexIop = InstObjParams("leavex", "Leavex", "PredOp",
{ "code": leavexCode,