summaryrefslogtreecommitdiff
path: root/src/arch/arm/isa/insts/misc.isa
diff options
context:
space:
mode:
authorGiacomo Travaglini <giacomo.travaglini@arm.com>2017-10-20 14:18:00 +0100
committerAndreas Sandberg <andreas.sandberg@arm.com>2017-11-15 14:16:57 +0000
commit053bb85b3220986f56fbbd24bd5bc7c04dea4ce6 (patch)
treee77da701e5f245253b48b9f4ac9fae4d6e35e802 /src/arch/arm/isa/insts/misc.isa
parentef0490081fa7ebcda2e1c7adccb05b3a14014cf1 (diff)
downloadgem5-053bb85b3220986f56fbbd24bd5bc7c04dea4ce6.tar.xz
arch-arm: Removing FlushPipe fault, using SquashAfter
This Patch is removing the FlushPipe ArmFault, which was used for flushing the pipeline in favour of the general IsSquashAfter StaticInstr flag. Using a fault was preventing tracers from tracing barriers like ISB and from adding them to the instruction count Change-Id: I176e9254eca904694f2f611eb486c55e50ec61ff Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Giacomo Gabrielli <giacomo.gabrielli@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5361 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch/arm/isa/insts/misc.isa')
-rw-r--r--src/arch/arm/isa/insts/misc.isa7
1 files changed, 3 insertions, 4 deletions
diff --git a/src/arch/arm/isa/insts/misc.isa b/src/arch/arm/isa/insts/misc.isa
index 4681d50a9..b42c9f9dd 100644
--- a/src/arch/arm/isa/insts/misc.isa
+++ b/src/arch/arm/isa/insts/misc.isa
@@ -1070,12 +1070,11 @@ let {{
return std::make_shared<HypervisorTrap>(machInst, imm,
EC_TRAPPED_CP15_MCR_MRC);
}
- fault = std::make_shared<FlushPipe>();
'''
isbIop = InstObjParams("isb", "Isb", "ImmOp",
{"code": isbCode,
"predicate_test": predicateTest},
- ['IsSerializeAfter'])
+ ['IsSerializeAfter', 'IsSquashAfter'])
header_output += ImmOpDeclare.subst(isbIop)
decoder_output += ImmOpConstructor.subst(isbIop)
exec_output += PredOpExecute.subst(isbIop)
@@ -1087,12 +1086,12 @@ let {{
return std::make_shared<HypervisorTrap>(machInst, imm,
EC_TRAPPED_CP15_MCR_MRC);
}
- fault = std::make_shared<FlushPipe>();
'''
dsbIop = InstObjParams("dsb", "Dsb", "ImmOp",
{"code": dsbCode,
"predicate_test": predicateTest},
- ['IsMemBarrier', 'IsSerializeAfter'])
+ ['IsMemBarrier', 'IsSerializeAfter',
+ 'IsSquashAfter'])
header_output += ImmOpDeclare.subst(dsbIop)
decoder_output += ImmOpConstructor.subst(dsbIop)
exec_output += PredOpExecute.subst(dsbIop)