diff options
| author | Ali Saidi <Ali.Saidi@ARM.com> | 2011-12-01 00:15:22 -0800 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2011-12-01 00:15:22 -0800 |
| commit | 5901c5223f2e9280aa6f2307288b6a5dc554df83 (patch) | |
| tree | 6631e747416445ce7d8f6eb5fb547cf8be081ea6 /src/arch/arm/isa/insts/misc.isa | |
| parent | 14441039988265b4cb64679fcae0ddb41f1f5e32 (diff) | |
| download | gem5-5901c5223f2e9280aa6f2307288b6a5dc554df83.tar.xz | |
ARM: Add IsSerializeAfter and IsNonSpeculative flag to the syscall instruction .
Squashes the subsequent instructions in O3 pipe after the service call, so that
they see the effect of the system call when re-executed. This isn't really an issue
with FS mode, but can show up in SE mode.
--HG--
extra : rebase_source : 613a69fe1d9834261e25a8cd340aa6b47578e1fe
Diffstat (limited to 'src/arch/arm/isa/insts/misc.isa')
| -rw-r--r-- | src/arch/arm/isa/insts/misc.isa | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/arch/arm/isa/insts/misc.isa b/src/arch/arm/isa/insts/misc.isa index 2cf54fcdb..870f037d0 100644 --- a/src/arch/arm/isa/insts/misc.isa +++ b/src/arch/arm/isa/insts/misc.isa @@ -49,7 +49,8 @@ let {{ svcIop = InstObjParams("svc", "Svc", "PredOp", { "code": svcCode, - "predicate_test": predicateTest }, ["IsSyscall"]) + "predicate_test": predicateTest }, + ["IsSyscall", "IsNonSpeculative", "IsSerializeAfter"]) header_output = BasicDeclare.subst(svcIop) decoder_output = BasicConstructor.subst(svcIop) exec_output = PredOpExecute.subst(svcIop) |