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authorAli Saidi <Ali.Saidi@ARM.com>2011-02-23 15:10:49 -0600
committerAli Saidi <Ali.Saidi@ARM.com>2011-02-23 15:10:49 -0600
commit7391ea6de63578722d97c9169e60db5b06754137 (patch)
treec544188de95cc72b74467bdec048883f300a5b61 /src/arch/arm/isa/insts/misc.isa
parentae3d45685512b75f878eb9d7917680fc3971988e (diff)
downloadgem5-7391ea6de63578722d97c9169e60db5b06754137.tar.xz
ARM: Do something for ISB, DSB, DMB
Diffstat (limited to 'src/arch/arm/isa/insts/misc.isa')
-rw-r--r--src/arch/arm/isa/insts/misc.isa11
1 files changed, 8 insertions, 3 deletions
diff --git a/src/arch/arm/isa/insts/misc.isa b/src/arch/arm/isa/insts/misc.isa
index ad5021daf..be51d927d 100644
--- a/src/arch/arm/isa/insts/misc.isa
+++ b/src/arch/arm/isa/insts/misc.isa
@@ -696,19 +696,23 @@ let {{
exec_output += ClrexCompleteAcc.subst(clrexIop)
isbCode = '''
+ fault = new FlushPipe;
'''
isbIop = InstObjParams("isb", "Isb", "PredOp",
{"code": isbCode,
- "predicate_test": predicateTest}, ['IsSerializing'])
+ "predicate_test": predicateTest},
+ ['IsSerializeAfter'])
header_output += BasicDeclare.subst(isbIop)
decoder_output += BasicConstructor.subst(isbIop)
exec_output += PredOpExecute.subst(isbIop)
dsbCode = '''
+ fault = new FlushPipe;
'''
dsbIop = InstObjParams("dsb", "Dsb", "PredOp",
{"code": dsbCode,
- "predicate_test": predicateTest},['IsMemBarrier'])
+ "predicate_test": predicateTest},
+ ['IsMemBarrier', 'IsSerializeAfter'])
header_output += BasicDeclare.subst(dsbIop)
decoder_output += BasicConstructor.subst(dsbIop)
exec_output += PredOpExecute.subst(dsbIop)
@@ -717,7 +721,8 @@ let {{
'''
dmbIop = InstObjParams("dmb", "Dmb", "PredOp",
{"code": dmbCode,
- "predicate_test": predicateTest},['IsMemBarrier'])
+ "predicate_test": predicateTest},
+ ['IsMemBarrier'])
header_output += BasicDeclare.subst(dmbIop)
decoder_output += BasicConstructor.subst(dmbIop)
exec_output += PredOpExecute.subst(dmbIop)