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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-10-13 01:57:31 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-10-13 01:57:31 -0700 |
| commit | 930c653270b1523cbeb32a4b48d1fd08eaac6eb8 (patch) | |
| tree | 57a7c91f46975998626424123edada275e8649fb /src/arch/arm/isa/insts/misc.isa | |
| parent | b273e0be33049fc36b386b5ba183f69de53268c2 (diff) | |
| download | gem5-930c653270b1523cbeb32a4b48d1fd08eaac6eb8.tar.xz | |
Mem: Change the CLREX flag to CLEAR_LL.
CLREX is the name of an ARM instruction, not a name for this generic flag.
Diffstat (limited to 'src/arch/arm/isa/insts/misc.isa')
| -rw-r--r-- | src/arch/arm/isa/insts/misc.isa | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/arch/arm/isa/insts/misc.isa b/src/arch/arm/isa/insts/misc.isa index f2a80a111..5742f84ab 100644 --- a/src/arch/arm/isa/insts/misc.isa +++ b/src/arch/arm/isa/insts/misc.isa @@ -671,7 +671,8 @@ let {{ exec_output += PredOpExecute.subst(setendIop) clrexCode = ''' - unsigned memAccessFlags = Request::CLREX|3|Request::LLSC; + unsigned memAccessFlags = Request::CLEAR_LL | + ArmISA::TLB::AlignWord | Request::LLSC; fault = xc->read(0, (uint32_t&)Mem, memAccessFlags); ''' clrexIop = InstObjParams("clrex", "Clrex","PredOp", |