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| author | Ali Saidi <Ali.Saidi@ARM.com> | 2011-05-13 17:27:02 -0500 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2011-05-13 17:27:02 -0500 |
| commit | 05866c82f9eb80db05fb423addcc8563efe1b744 (patch) | |
| tree | dc5d03a1f3021a979705dc66de9598d721812bb4 /src/arch/arm/isa/insts/mult.isa | |
| parent | 401165c778108ab22aeeee55c4f4451ca93bcffb (diff) | |
| download | gem5-05866c82f9eb80db05fb423addcc8563efe1b744.tar.xz | |
ARM: Construct the predicate test register for more instruction programatically.
If one of the condition codes isn't being used in the execution we should only
read it if the instruction might be dependent on it. With the preeceding changes
there are several more cases where we should dynamically pick instead of assuming
as we did before.
Diffstat (limited to 'src/arch/arm/isa/insts/mult.isa')
| -rw-r--r-- | src/arch/arm/isa/insts/mult.isa | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/arch/arm/isa/insts/mult.isa b/src/arch/arm/isa/insts/mult.isa index f4f8b867e..fe4390956 100644 --- a/src/arch/arm/isa/insts/mult.isa +++ b/src/arch/arm/isa/insts/mult.isa @@ -87,14 +87,14 @@ let {{ if unCc: iop = InstObjParams(mnem, Name, base, - {"code" : code, - "predicate_test": predicateTest, - "op_class": "IntMultOp" }) + {"code" : code, + "predicate_test": pickPredicate(code), + "op_class": "IntMultOp" }) if doCc: iopCc = InstObjParams(mnem + "s", Name + "Cc", base, - {"code" : code + ccCode, - "predicate_test": condPredicateTest, - "op_class": "IntMultOp" }) + {"code" : code + ccCode, + "predicate_test": pickPredicate(code + ccCode), + "op_class": "IntMultOp" }) if regs == 3: declare = Mult3Declare |