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author | Akash Bagdia <akash.bagdia@ARM.com> | 2014-09-02 11:26:32 +0100 |
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committer | Akash Bagdia <akash.bagdia@ARM.com> | 2014-09-02 11:26:32 +0100 |
commit | 8b7724d04c8bd337c096ac4364beceac6a64cde2 (patch) | |
tree | 26a81a50175bdd7bd8fc66de94efed706f4a12a4 /src/arch/arm/isa/insts | |
parent | d6f1c6ce89c16eda7d86c319cc92f551ee352496 (diff) | |
download | gem5-8b7724d04c8bd337c096ac4364beceac6a64cde2.tar.xz |
arm: Don't speculatively access most miscregisters.
Speculative exeuction can cause panics in detailed execution mode that
shouldn't happen.
Diffstat (limited to 'src/arch/arm/isa/insts')
-rw-r--r-- | src/arch/arm/isa/insts/misc.isa | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/arm/isa/insts/misc.isa b/src/arch/arm/isa/insts/misc.isa index 5403ddc8d..6ecaa78de 100644 --- a/src/arch/arm/isa/insts/misc.isa +++ b/src/arch/arm/isa/insts/misc.isa @@ -219,7 +219,7 @@ let {{ msrBankedRegIop = InstObjParams("msr", "MsrBankedReg", "MsrRegOp", { "code": msrBankedRegCode, "predicate_test": predicateTest }, - ["IsSerializeAfter"]) + ["IsSerializeAfter", "IsNonSpeculative"]) header_output += MsrBankedRegDeclare.subst(msrBankedRegIop) decoder_output += MsrBankedRegConstructor.subst(msrBankedRegIop) exec_output += PredOpExecute.subst(msrBankedRegIop) |