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| author | Giacomo Gabrielli <giacomo.gabrielli@arm.com> | 2017-02-14 14:25:41 +0000 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-08-10 12:25:45 +0000 |
| commit | 1da285dfcc31b904afc27e440544d006aae25b38 (patch) | |
| tree | 99617b963f28f5c06dc20479958067dee04db5c0 /src/arch/arm/isa/insts | |
| parent | 16fa8d7cc8c92f5ab879e4cf9c6c0bbb3567860f (diff) | |
| download | gem5-1da285dfcc31b904afc27e440544d006aae25b38.tar.xz | |
arm: Add support for RCpc load-acquire instructions (ARMv8.3)
Please note that at the moment these instructions behave like the
existing load-acquire instructions, which follow the more conservative
RCsc consistency model. This means that the new instructions are
_functionally_ correct, but the potential performance improvements
enabled by the RCpc model will not be experienced in timing
simulations.
Change-Id: I04c786ad2941072bf28feba7d2ec6e142c8b74cb
Reviewed-by: Andreas Hansson <andreas.hansson@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/11989
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Giacomo Travaglini <giacomo.travaglini@arm.com>
Diffstat (limited to 'src/arch/arm/isa/insts')
| -rw-r--r-- | src/arch/arm/isa/insts/ldr64.isa | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/src/arch/arm/isa/insts/ldr64.isa b/src/arch/arm/isa/insts/ldr64.isa index 8c966e40e..7c177263d 100644 --- a/src/arch/arm/isa/insts/ldr64.isa +++ b/src/arch/arm/isa/insts/ldr64.isa @@ -1,6 +1,6 @@ // -*- mode:c++ -*- -// Copyright (c) 2011-2014 ARM Limited +// Copyright (c) 2011-2014, 2017 ARM Limited // All rights reserved // // The license below extends only to copyright in the software and shall @@ -416,6 +416,11 @@ let {{ LoadEx64("ldxrh", "LDXRH64", 2, flavor="exclusive").emit() LoadEx64("ldxrb", "LDXRB64", 1, flavor="exclusive").emit() + LoadRaw64("ldapr", "LDAPRX64", 8, flavor="acquire").emit() + LoadRaw64("ldapr", "LDAPRW64", 4, flavor="acquire").emit() + LoadRaw64("ldaprh", "LDAPRH64", 2, flavor="acquire").emit() + LoadRaw64("ldaprb", "LDAPRB64", 1, flavor="acquire").emit() + class LoadImmU64(LoadImm64): decConstBase = 'LoadStoreImmU64' micro = True |