ARM: Cleanup implementation of ITSTATE and put important code in PCState.

Consolidate all code to handle ITSTATE in the PCState object rather than
touching a variety of structures/objects.

3 files changed, 4 insertions, 12 deletions

diff --git a/src/arch/arm/isa/insts/data.isa b/src/arch/arm/isa/insts/data.isa
index 9af81b465..e8012ff89 100644
--- a/src/arch/arm/isa/insts/data.isa
+++ b/src/arch/arm/isa/insts/data.isa
@@ -245,7 +245,7 @@ let {{
             CondCodes = CondCodesMask & newCpsr;
             NextThumb = ((CPSR)newCpsr).t;
             NextJazelle = ((CPSR)newCpsr).j;
-            ForcedItState = ((((CPSR)newCpsr).it2 << 2) & 0xFC)
+            NextItState = ((((CPSR)newCpsr).it2 << 2) & 0xFC)
                 | (((CPSR)newCpsr).it1 & 0x3);
             '''
             buildImmDataInst(mnem + 's', code, flagType,
diff --git a/src/arch/arm/isa/insts/macromem.isa b/src/arch/arm/isa/insts/macromem.isa
index 15879e0e3..28b140b93 100644
--- a/src/arch/arm/isa/insts/macromem.isa
+++ b/src/arch/arm/isa/insts/macromem.isa
@@ -94,7 +94,7 @@ let {{
         Cpsr = ~CondCodesMask & newCpsr;
         CondCodes = CondCodesMask & newCpsr;
         IWNPC = cSwap(%s, cpsr.e) | ((Spsr & 0x20) ? 1 : 0);
-        ForcedItState = ((((CPSR)Spsr).it2 << 2) & 0xFC)
+        NextItState = ((((CPSR)Spsr).it2 << 2) & 0xFC)
                 | (((CPSR)Spsr).it1 & 0x3);
     '''
 
@@ -628,7 +628,7 @@ let {{
                     Cpsr = ~CondCodesMask & newCpsr;
                     NextThumb = ((CPSR)newCpsr).t;
                     NextJazelle = ((CPSR)newCpsr).j;
-                    ForcedItState = ((((CPSR)URb).it2 << 2) & 0xFC)
+                    NextItState = ((((CPSR)URb).it2 << 2) & 0xFC)
                                     | (((CPSR)URb).it1 & 0x3);
                     CondCodes = CondCodesMask & newCpsr;
                     '''
diff --git a/src/arch/arm/isa/insts/misc.isa b/src/arch/arm/isa/insts/misc.isa
index cf5c7b47a..35df88c81 100644
--- a/src/arch/arm/isa/insts/misc.isa
+++ b/src/arch/arm/isa/insts/misc.isa
@@ -83,10 +83,6 @@ let {{
         uint32_t newCpsr =
             cpsrWriteByInstr(Cpsr | CondCodes, Op1, byteMask, false, sctlr.nmfi);
         Cpsr = ~CondCodesMask & newCpsr;
-        NextThumb = ((CPSR)newCpsr).t;
-        NextJazelle = ((CPSR)newCpsr).j;
-        ForcedItState = ((((CPSR)Op1).it2 << 2) & 0xFC)
-                | (((CPSR)Op1).it1 & 0x3);
         CondCodes = CondCodesMask & newCpsr;
     '''
     msrCpsrRegIop = InstObjParams("msr", "MsrCpsrReg", "MsrRegOp",
@@ -111,10 +107,6 @@ let {{
         uint32_t newCpsr =
             cpsrWriteByInstr(Cpsr | CondCodes, imm, byteMask, false, sctlr.nmfi);
         Cpsr = ~CondCodesMask & newCpsr;
-        NextThumb = ((CPSR)newCpsr).t;
-        NextJazelle = ((CPSR)newCpsr).j;
-        ForcedItState = ((((CPSR)imm).it2 << 2) & 0xFC)
-            | (((CPSR)imm).it1 & 0x3);
         CondCodes = CondCodesMask & newCpsr;
     '''
     msrCpsrImmIop = InstObjParams("msr", "MsrCpsrImm", "MsrImmOp",
@@ -538,7 +530,7 @@ let {{
     exec_output += PredOpExecute.subst(sevIop)
 
     itIop = InstObjParams("it", "ItInst", "PredOp", \
-            { "code" : "Itstate = machInst.newItstate;",
+            { "code" : ";",
               "predicate_test" : predicateTest },
             ["IsNonSpeculative", "IsSerializeAfter"])
     header_output += BasicDeclare.subst(itIop)