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authorGabe Black <gblack@eecs.umich.edu>2012-01-07 02:15:35 -0800
committerGabe Black <gblack@eecs.umich.edu>2012-01-07 02:15:35 -0800
commitec936364b7238cddea7734ea79c6e04b52a683c6 (patch)
tree788fc19c3ba599d6f39d3990769888a0650be5ff /src/arch/arm/isa/insts
parent36a822f08e88483b41af214ace4fd3dccf3aa8cb (diff)
parent9b52717a92ed9592bd98a41683509f538262a5c7 (diff)
downloadgem5-ec936364b7238cddea7734ea79c6e04b52a683c6.tar.xz
Merge with the main repository again.
Diffstat (limited to 'src/arch/arm/isa/insts')
-rw-r--r--src/arch/arm/isa/insts/misc.isa3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/arch/arm/isa/insts/misc.isa b/src/arch/arm/isa/insts/misc.isa
index 495cb722c..b671843cf 100644
--- a/src/arch/arm/isa/insts/misc.isa
+++ b/src/arch/arm/isa/insts/misc.isa
@@ -49,7 +49,8 @@ let {{
svcIop = InstObjParams("svc", "Svc", "PredOp",
{ "code": svcCode,
- "predicate_test": predicateTest }, ["IsSyscall"])
+ "predicate_test": predicateTest },
+ ["IsSyscall", "IsNonSpeculative", "IsSerializeAfter"])
header_output = BasicDeclare.subst(svcIop)
decoder_output = BasicConstructor.subst(svcIop)
exec_output = PredOpExecute.subst(svcIop)