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| author | Gedare Bloom <gedare@rtems.org> | 2017-05-24 18:35:50 -0400 |
|---|---|---|
| committer | Gedare Bloom <gedare@rtems.org> | 2017-07-13 16:39:17 +0000 |
| commit | c473bdb8916528be4ff896c5e9378e6200f68939 (patch) | |
| tree | 864c63152be19a795889bb3bcd5e48786028cf49 /src/arch/arm/isa/operands.isa | |
| parent | fc575f8266149c78b29bcbe12ab86ccb7614ffbf (diff) | |
| download | gem5-c473bdb8916528be4ff896c5e9378e6200f68939.tar.xz | |
arch-arm: fix ldm of pc interswitching branch
The LDM instruction that loads to the PC causes a branch to the
instruction. In ARMv5T+ the branch can interswitch Thumb and ARM modes.
The interswitch is broken prior to this commit, with LDM to the PC
ignoring the switch.
Change-Id: I6aad073206743f3435c9923e3e2218bfe32c7e05
Reviewed-on: https://gem5-review.googlesource.com/3520
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch/arm/isa/operands.isa')
| -rw-r--r-- | src/arch/arm/isa/operands.isa | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/arm/isa/operands.isa b/src/arch/arm/isa/operands.isa index 5898075ab..2e2955a80 100644 --- a/src/arch/arm/isa/operands.isa +++ b/src/arch/arm/isa/operands.isa @@ -193,6 +193,7 @@ def operands {{ 'Dest2': intReg('dest2'), 'XDest2': intRegX64('dest2'), 'FDest2': floatReg('dest2'), + 'IWDest2': intRegIWPC('dest2'), 'Result': intReg('result'), 'XResult': intRegX64('result'), 'XBase': intRegX64('base', id = srtBase), |