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| author | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-06-02 13:41:26 +0100 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2016-06-02 13:41:26 +0100 |
| commit | 660fbd543f7c84dec81cd17bdb4ff08f954aec77 (patch) | |
| tree | a03fb18c83b32031b5331767e3067a026d641775 /src/arch/arm/isa/operands.isa | |
| parent | f48ad5b29d6f291b4f3679ff5fb7b5beae10d6fa (diff) | |
| download | gem5-660fbd543f7c84dec81cd17bdb4ff08f954aec77.tar.xz | |
arm: Rewrite ERET to behave according to the ARMv8 ARM
The ERET instruction doesn't set PSTATE correctly in some cases
(particularly when returning to aarch32 code). Among other things,
this breaks EL0 thumb code when using a 64-bit kernel. This changeset
updates the ERET implementation to match the ARM ARM.
Change-Id: I408e7c69a23cce437859313dfe84e68744b07c98
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Nathanael Premillieu <nathanael.premillieu@arm.com>
Diffstat (limited to 'src/arch/arm/isa/operands.isa')
| -rw-r--r-- | src/arch/arm/isa/operands.isa | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/arm/isa/operands.isa b/src/arch/arm/isa/operands.isa index 018c0956b..e48c154d4 100644 --- a/src/arch/arm/isa/operands.isa +++ b/src/arch/arm/isa/operands.isa @@ -440,6 +440,7 @@ def operands {{ 'NextJazelle': pcStateReg('nextJazelle', srtMode), 'NextItState': pcStateReg('nextItstate', srtMode), 'Itstate': pcStateReg('itstate', srtMode), + 'NextAArch64': pcStateReg('nextAArch64', srtMode), #Register operands depending on a field in the instruction encoding. These #should be avoided since they may not be portable across different |