summaryrefslogtreecommitdiff
path: root/src/arch/arm/isa/templates/macromem.isa
diff options
context:
space:
mode:
authorMatt Horsnell <Matt.Horsnell@arm.com>2011-03-17 19:20:19 -0500
committerMatt Horsnell <Matt.Horsnell@arm.com>2011-03-17 19:20:19 -0500
commit031f396c71e750fede19651ba3a14e262a87e117 (patch)
treebfd6520d87f36775200aff930b632bfe3c80af1e /src/arch/arm/isa/templates/macromem.isa
parente65f480d62e0112e89af6130e2f2024d89417df0 (diff)
downloadgem5-031f396c71e750fede19651ba3a14e262a87e117.tar.xz
ARM: Fix RFE macrop.
This changes the RFE macroop into 3 microops: URa = [sp]; URb = [sp+4]; // load CPSR,PC values from stack sp = sp + offset; // optionally auto-increment PC = URa; CPSR = URb; // write to the PC and CPSR. Importantly: - writing to PC is handled in the last micro-op. - loading occurs prior to state changes.
Diffstat (limited to 'src/arch/arm/isa/templates/macromem.isa')
-rw-r--r--src/arch/arm/isa/templates/macromem.isa35
1 files changed, 35 insertions, 0 deletions
diff --git a/src/arch/arm/isa/templates/macromem.isa b/src/arch/arm/isa/templates/macromem.isa
index b7ca7fa48..a7f7f0da8 100644
--- a/src/arch/arm/isa/templates/macromem.isa
+++ b/src/arch/arm/isa/templates/macromem.isa
@@ -109,6 +109,41 @@ def template MicroNeonMemDeclare {{
////////////////////////////////////////////////////////////////////
//
+// PC = Integer(ura)
+// CPSR = Integer(urb)
+//
+
+def template MicroSetPCCPSRDeclare {{
+ class %(class_name)s : public %(base_class)s
+ {
+ public:
+ %(class_name)s(ExtMachInst machInst,
+ IntRegIndex _ura,
+ IntRegIndex _urb,
+ IntRegIndex _urc);
+ %(BasicExecDeclare)s
+ };
+}};
+
+def template MicroSetPCCPSRConstructor {{
+ %(class_name)s::%(class_name)s(ExtMachInst machInst,
+ IntRegIndex _ura,
+ IntRegIndex _urb,
+ IntRegIndex _urc)
+ : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
+ _ura, _urb, _urc)
+ {
+ %(constructor)s;
+ if (!(condCode == COND_AL || condCode == COND_UC)) {
+ for (int x = 0; x < _numDestRegs; x++) {
+ _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
+ }
+ }
+ }
+}};
+
+////////////////////////////////////////////////////////////////////
+//
// Integer = Integer op Integer microops
//