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| author | Ali Saidi <Ali.Saidi@ARM.com> | 2015-01-25 07:22:56 -0500 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2015-01-25 07:22:56 -0500 |
| commit | 89b3616d7e3318637c1550605703f140ecf7b65f (patch) | |
| tree | d48100983efac8e18465c4dbf69670ce2ee42cb1 /src/arch/arm/isa/templates/mem64.isa | |
| parent | 9d8ddd92dc99671db0706413b4f7a7d391d5f58c (diff) | |
| download | gem5-89b3616d7e3318637c1550605703f140ecf7b65f.tar.xz | |
arm: always set the IsFirstMicroop flag
While the IsFirstMicroop flag exists it was only occasionally used in the ARM
instructions that gem5 microOps and therefore couldn't be relied on to be correct.
Diffstat (limited to 'src/arch/arm/isa/templates/mem64.isa')
| -rw-r--r-- | src/arch/arm/isa/templates/mem64.isa | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/arch/arm/isa/templates/mem64.isa b/src/arch/arm/isa/templates/mem64.isa index 3d6cadb5d..72ee882a7 100644 --- a/src/arch/arm/isa/templates/mem64.isa +++ b/src/arch/arm/isa/templates/mem64.isa @@ -1,6 +1,6 @@ // -*- mode:c++ -*- -// Copyright (c) 2011-2013 ARM Limited +// Copyright (c) 2011-2014 ARM Limited // All rights reserved // // The license below extends only to copyright in the software and shall @@ -556,6 +556,7 @@ def template LoadStoreImm64Constructor {{ uops = new StaticInstPtr[numMicroops]; uops[0] = new %(acc_name)s(machInst, _dest, _base, _imm); uops[0]->setDelayedCommit(); + uops[0]->setFirstMicroop(); uops[1] = new %(wb_decl)s; uops[1]->setLastMicroop(); #endif @@ -615,6 +616,7 @@ def template LoadStoreReg64Constructor {{ uops[0] = new %(acc_name)s(machInst, _dest, _base, _offset, _type, _shiftAmt); uops[0]->setDelayedCommit(); + uops[0]->setFirstMicroop(); uops[1] = new %(wb_decl)s; uops[1]->setLastMicroop(); #endif @@ -666,6 +668,7 @@ def template LoadStoreLit64Constructor {{ uops = new StaticInstPtr[numMicroops]; uops[0] = new %(acc_name)s(machInst, _dest, _imm); uops[0]->setDelayedCommit(); + uops[0]->setFirstMicroop(); uops[1] = new %(wb_decl)s; uops[1]->setLastMicroop(); #endif |