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authorCurtis Dunham <Curtis.Dunham@arm.com>2014-05-09 18:58:46 -0400
committerCurtis Dunham <Curtis.Dunham@arm.com>2014-05-09 18:58:46 -0400
commit7f1603d20728d7990d1d304bbdb6abdfb7eb53d7 (patch)
tree1e7b8267b063cdf10c8180757b6b2f002dea8898 /src/arch/arm/isa/templates/mem64.isa
parenteb61f0123b992236b3ef8331ed35d5954a62a44d (diff)
downloadgem5-7f1603d20728d7990d1d304bbdb6abdfb7eb53d7.tar.xz
arch: remove inline specifiers on all inst constrs, all ISAs
With (upcoming) separate compilation, they are useless. Only link-time optimization could re-inline them, but ideally feedback-directed optimization would choose to do so only for profitable (i.e. common) instructions.
Diffstat (limited to 'src/arch/arm/isa/templates/mem64.isa')
-rw-r--r--src/arch/arm/isa/templates/mem64.isa2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/arm/isa/templates/mem64.isa b/src/arch/arm/isa/templates/mem64.isa
index 87dcba988..4d4b27ba9 100644
--- a/src/arch/arm/isa/templates/mem64.isa
+++ b/src/arch/arm/isa/templates/mem64.isa
@@ -589,7 +589,7 @@ def template LoadStoreImmDU64Constructor {{
}};
def template StoreImmDEx64Constructor {{
- inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
+ %(class_name)s::%(class_name)s(ExtMachInst machInst,
IntRegIndex _result, IntRegIndex _dest, IntRegIndex _dest2,
IntRegIndex _base, int64_t _imm)
: %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,