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authorGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:05 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:05 -0500
commitc981a4de2b317a3e5dd6813e809973c7d6734f41 (patch)
tree3f0b326d5957478f429980e8ffd8a002076b4037 /src/arch/arm/isa/templates/misc.isa
parent57443a2144c6f446c7b7a3de7389ae794d591330 (diff)
downloadgem5-c981a4de2b317a3e5dd6813e809973c7d6734f41.tar.xz
ARM: Add base classes suitable for the REV* instructions.
Diffstat (limited to 'src/arch/arm/isa/templates/misc.isa')
-rw-r--r--src/arch/arm/isa/templates/misc.isa21
1 files changed, 21 insertions, 0 deletions
diff --git a/src/arch/arm/isa/templates/misc.isa b/src/arch/arm/isa/templates/misc.isa
index a19228b3b..566d0a8dd 100644
--- a/src/arch/arm/isa/templates/misc.isa
+++ b/src/arch/arm/isa/templates/misc.isa
@@ -98,3 +98,24 @@ def template MsrImmConstructor {{
%(constructor)s;
}
}};
+
+def template RevOpDeclare {{
+class %(class_name)s : public %(base_class)s
+{
+ protected:
+ public:
+ // Constructor
+ %(class_name)s(ExtMachInst machInst,
+ IntRegIndex _dest, IntRegIndex _op1);
+ %(BasicExecDeclare)s
+};
+}};
+
+def template RevOpConstructor {{
+ inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
+ IntRegIndex _dest, IntRegIndex _op1)
+ : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _op1)
+ {
+ %(constructor)s;
+ }
+}};