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authorGiacomo Travaglini <giacomo.travaglini@arm.com>2018-02-14 17:45:38 +0000
committerGiacomo Travaglini <giacomo.travaglini@arm.com>2018-02-20 13:30:02 +0000
commit803a8db53aae57d42bd2465c9284df91ed5e7641 (patch)
treeffbc793bf70c643e6f1f686eb5cd8188737000c5 /src/arch/arm/isa/templates/misc64.isa
parenta3bb33b257324ad9da3e656e30ba61e6f4b5497f (diff)
downloadgem5-803a8db53aae57d42bd2465c9284df91ed5e7641.tar.xz
arch-arm: Fix Hlt64,Svc64,Hvc64,Smc64,Brk64 disassembly
This patch fixes the disassembly of AArch64 Exception Generating instructions, which were not printing the encoded immediate field. This has been accomplished by changing their underlying type to a newly defined one. Change-Id: If58ae3e620d2baa260e12ecdc850225adfcf1ee5 Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/8368 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/arch/arm/isa/templates/misc64.isa')
-rw-r--r--src/arch/arm/isa/templates/misc64.isa22
1 files changed, 21 insertions, 1 deletions
diff --git a/src/arch/arm/isa/templates/misc64.isa b/src/arch/arm/isa/templates/misc64.isa
index 48d5c6426..3811cb56a 100644
--- a/src/arch/arm/isa/templates/misc64.isa
+++ b/src/arch/arm/isa/templates/misc64.isa
@@ -1,6 +1,6 @@
// -*- mode:c++ -*-
-// Copyright (c) 2011,2017 ARM Limited
+// Copyright (c) 2011,2017-2018 ARM Limited
// All rights reserved
//
// The license below extends only to copyright in the software and shall
@@ -37,6 +37,26 @@
//
// Authors: Gabe Black
+def template ImmOp64Declare {{
+class %(class_name)s : public %(base_class)s
+{
+ protected:
+ public:
+ // Constructor
+ %(class_name)s(ExtMachInst machInst,uint64_t _imm);
+
+ Fault execute(ExecContext *, Trace::InstRecord *) const;
+};
+}};
+
+def template ImmOp64Constructor {{
+ %(class_name)s::%(class_name)s(ExtMachInst machInst, uint64_t _imm)
+ : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _imm)
+ {
+ %(constructor)s;
+ }
+}};
+
def template RegRegImmImmOp64Declare {{
class %(class_name)s : public %(base_class)s
{