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authorGiacomo Gabrielli <Giacomo.Gabrielli@arm.com>2011-02-23 15:10:50 -0600
committerGiacomo Gabrielli <Giacomo.Gabrielli@arm.com>2011-02-23 15:10:50 -0600
commit7ee2de31c4ed6d4eb0f57dcc798fd1126e9fa314 (patch)
tree3a4b40dceb6f785966bc60bf751e37e7684ec55f /src/arch/arm/isa/templates/neon.isa
parent3de8e0a0d4acaee84760961089db623518b784f7 (diff)
downloadgem5-7ee2de31c4ed6d4eb0f57dcc798fd1126e9fa314.tar.xz
ARM: NEON instruction templates modified to set the predicate flag to false when needed.
Diffstat (limited to 'src/arch/arm/isa/templates/neon.isa')
-rw-r--r--src/arch/arm/isa/templates/neon.isa4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/arch/arm/isa/templates/neon.isa b/src/arch/arm/isa/templates/neon.isa
index 02c2bb30d..2e88c9333 100644
--- a/src/arch/arm/isa/templates/neon.isa
+++ b/src/arch/arm/isa/templates/neon.isa
@@ -225,6 +225,8 @@ def template NeonEqualRegExecute {{
{
%(op_wb)s;
}
+ } else {
+ xc->setPredicate(false);
}
if (fault == NoFault && machInst.itstateMask != 0) {
@@ -275,6 +277,8 @@ def template NeonUnequalRegExecute {{
{
%(op_wb)s;
}
+ } else {
+ xc->setPredicate(false);
}
if (fault == NoFault && machInst.itstateMask != 0) {