summaryrefslogtreecommitdiff
path: root/src/arch/arm/isa/templates/vfp64.isa
diff options
context:
space:
mode:
authorCurtis Dunham <Curtis.Dunham@arm.com>2014-05-09 18:58:46 -0400
committerCurtis Dunham <Curtis.Dunham@arm.com>2014-05-09 18:58:46 -0400
commit7f1603d20728d7990d1d304bbdb6abdfb7eb53d7 (patch)
tree1e7b8267b063cdf10c8180757b6b2f002dea8898 /src/arch/arm/isa/templates/vfp64.isa
parenteb61f0123b992236b3ef8331ed35d5954a62a44d (diff)
downloadgem5-7f1603d20728d7990d1d304bbdb6abdfb7eb53d7.tar.xz
arch: remove inline specifiers on all inst constrs, all ISAs
With (upcoming) separate compilation, they are useless. Only link-time optimization could re-inline them, but ideally feedback-directed optimization would choose to do so only for profitable (i.e. common) instructions.
Diffstat (limited to 'src/arch/arm/isa/templates/vfp64.isa')
-rw-r--r--src/arch/arm/isa/templates/vfp64.isa10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/arch/arm/isa/templates/vfp64.isa b/src/arch/arm/isa/templates/vfp64.isa
index 0935cd78a..761a853a9 100644
--- a/src/arch/arm/isa/templates/vfp64.isa
+++ b/src/arch/arm/isa/templates/vfp64.isa
@@ -38,7 +38,7 @@
// Authors: Thomas Grocutt
def template AA64FpRegRegOpConstructor {{
- inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
+ %(class_name)s::%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest, IntRegIndex _op1,
VfpMicroMode mode)
: %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
@@ -52,7 +52,7 @@ def template AA64FpRegRegOpConstructor {{
}};
def template AA64FpRegImmOpConstructor {{
- inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
+ %(class_name)s::%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest, uint64_t _imm, VfpMicroMode mode)
: %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
_dest, _imm, mode)
@@ -65,7 +65,7 @@ def template AA64FpRegImmOpConstructor {{
}};
def template AA64FpRegRegImmOpConstructor {{
- inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
+ %(class_name)s::%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest,
IntRegIndex _op1,
uint64_t _imm,
@@ -81,7 +81,7 @@ def template AA64FpRegRegImmOpConstructor {{
}};
def template AA64FpRegRegRegOpConstructor {{
- inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
+ %(class_name)s::%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest,
IntRegIndex _op1,
IntRegIndex _op2,
@@ -109,7 +109,7 @@ class %(class_name)s : public %(base_class)s
}};
def template AA64FpRegRegRegRegOpConstructor {{
- inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
+ %(class_name)s::%(class_name)s(ExtMachInst machInst,
IntRegIndex _dest,
IntRegIndex _op1,
IntRegIndex _op2,