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| author | Gabe Black <gblack@eecs.umich.edu> | 2011-10-31 01:09:44 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2011-10-31 01:09:44 -0700 |
| commit | d735abe5dabf483aafb0ccfb0a70cb7c3b0a5a74 (patch) | |
| tree | dd273d4e65d4ba5a11a5928f3aa4d012fbcd2e19 /src/arch/arm/isa/templates | |
| parent | ce2f9625f4c4ed0bf6a79eede184a222e61b1f26 (diff) | |
| download | gem5-d735abe5dabf483aafb0ccfb0a70cb7c3b0a5a74.tar.xz | |
GCC: Get everything working with gcc 4.6.1.
And by "everything" I mean all the quick regressions.
Diffstat (limited to 'src/arch/arm/isa/templates')
| -rw-r--r-- | src/arch/arm/isa/templates/mem.isa | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/arm/isa/templates/mem.isa b/src/arch/arm/isa/templates/mem.isa index a00114409..a4a740f89 100644 --- a/src/arch/arm/isa/templates/mem.isa +++ b/src/arch/arm/isa/templates/mem.isa @@ -1112,7 +1112,7 @@ def template LoadRegConstructor {{ (IntRegIndex)_index) { %(constructor)s; - bool conditional = false; + bool conditional M5_VAR_USED = false; if (!(condCode == COND_AL || condCode == COND_UC)) { conditional = true; for (int x = 0; x < _numDestRegs; x++) { @@ -1166,7 +1166,7 @@ def template LoadImmConstructor {{ (IntRegIndex)_dest, (IntRegIndex)_base, _add, _imm) { %(constructor)s; - bool conditional = false; + bool conditional M5_VAR_USED = false; if (!(condCode == COND_AL || condCode == COND_UC)) { conditional = true; for (int x = 0; x < _numDestRegs; x++) { |