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author | Ali Saidi <Ali.Saidi@ARM.com> | 2011-04-04 11:42:29 -0500 |
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committer | Ali Saidi <Ali.Saidi@ARM.com> | 2011-04-04 11:42:29 -0500 |
commit | 8af1eeec6f28d9722802bf1588c911711db07ddd (patch) | |
tree | 79f0ba732e6aa8935e78a6e8e8f15896784f370e /src/arch/arm/isa/templates | |
parent | 6b6989049383b67a2daef562a0319421ff1a8067 (diff) | |
download | gem5-8af1eeec6f28d9722802bf1588c911711db07ddd.tar.xz |
ARM: Use CPU local lock before sending load to mem system.
This change uses the locked_mem.hh header to handle implementing CLREX. It
simplifies the current implementation greatly.
Diffstat (limited to 'src/arch/arm/isa/templates')
-rw-r--r-- | src/arch/arm/isa/templates/misc.isa | 51 |
1 files changed, 0 insertions, 51 deletions
diff --git a/src/arch/arm/isa/templates/misc.isa b/src/arch/arm/isa/templates/misc.isa index 694dc46da..212897aa0 100644 --- a/src/arch/arm/isa/templates/misc.isa +++ b/src/arch/arm/isa/templates/misc.isa @@ -402,54 +402,3 @@ def template RegImmRegShiftOpConstructor {{ } }}; -def template ClrexDeclare {{ - /** - * Static instruction class for "%(mnemonic)s". - */ - class %(class_name)s : public %(base_class)s - { - public: - - /// Constructor. - %(class_name)s(ExtMachInst machInst); - - %(BasicExecDeclare)s - - %(InitiateAccDeclare)s - - %(CompleteAccDeclare)s - }; -}}; - -def template ClrexInitiateAcc {{ - Fault %(class_name)s::initiateAcc(%(CPU_exec_context)s *xc, - Trace::InstRecord *traceData) const - { - Fault fault = NoFault; - %(op_decl)s; - %(op_rd)s; - - if (%(predicate_test)s) - { - if (fault == NoFault) { - unsigned memAccessFlags = Request::CLEAR_LL | - ArmISA::TLB::AlignWord | Request::LLSC; - fault = xc->read(0, (uint32_t&)Mem, memAccessFlags); - } - } else { - xc->setPredicate(false); - } - - return fault; - } -}}; - -def template ClrexCompleteAcc {{ - Fault %(class_name)s::completeAcc(PacketPtr pkt, - %(CPU_exec_context)s *xc, - Trace::InstRecord *traceData) const - { - return NoFault; - } -}}; - |