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authorCurtis Dunham <Curtis.Dunham@arm.com>2014-06-27 12:29:00 -0500
committerCurtis Dunham <Curtis.Dunham@arm.com>2014-06-27 12:29:00 -0500
commitf6f63ec0aa68f631691d9eccc18739722a0a9f17 (patch)
tree6d3cd4d0f43381980412ade2ed8266e3d3ba472d /src/arch/arm/isa/templates
parent3be4f4b846f991c98fe1909631996c5b58d52437 (diff)
downloadgem5-f6f63ec0aa68f631691d9eccc18739722a0a9f17.tar.xz
mem: write streaming support via WriteInvalidate promotion
Support full-block writes directly rather than requiring RMW: * a cache line is allocated in the cache upon receipt of a WriteInvalidateReq, not the WriteInvalidateResp. * only top-level caches allocate the line; the others just pass the request along and invalidate as necessary. * to close a timing window between the *Req and the *Resp, a new metadata bit tracks whether another cache has read a copy of the new line before the writeback to memory.
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