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| author | Andreas Hansson <andreas.hansson@arm.com> | 2014-10-01 08:05:51 -0400 |
|---|---|---|
| committer | Andreas Hansson <andreas.hansson@arm.com> | 2014-10-01 08:05:51 -0400 |
| commit | 10f82934be924f265af4f10b15ca66106171f770 (patch) | |
| tree | e8e92c73422751d4ee26c3b87ceae204fa520751 /src/arch/arm/isa/templates | |
| parent | ff2d58f935c434e89a499474d3bda76f476e6d25 (diff) | |
| download | gem5-10f82934be924f265af4f10b15ca66106171f770.tar.xz | |
arm: More UBSan cleanups after additional full-system runs
Some incorrect casting to IntRegIndex, and a few uninitialized members
in the i8254xGBe device.
Diffstat (limited to 'src/arch/arm/isa/templates')
| -rw-r--r-- | src/arch/arm/isa/templates/misc.isa | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/arch/arm/isa/templates/misc.isa b/src/arch/arm/isa/templates/misc.isa index 5cd4637a6..d661b4f18 100644 --- a/src/arch/arm/isa/templates/misc.isa +++ b/src/arch/arm/isa/templates/misc.isa @@ -183,7 +183,7 @@ class %(class_name)s : public %(base_class)s protected: public: // Constructor - %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, + %(class_name)s(ExtMachInst machInst, MiscRegIndex _op1, IntRegIndex _dest, IntRegIndex _dest2, uint32_t imm); %(BasicExecDeclare)s }; @@ -191,7 +191,7 @@ class %(class_name)s : public %(base_class)s def template MrrcOpConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, - IntRegIndex op1, + MiscRegIndex op1, IntRegIndex dest, IntRegIndex dest2, uint32_t imm) @@ -214,7 +214,7 @@ class %(class_name)s : public %(base_class)s public: // Constructor %(class_name)s(ExtMachInst machInst, IntRegIndex _op1, IntRegIndex _op2, - IntRegIndex _dest, uint32_t imm); + MiscRegIndex _dest, uint32_t imm); %(BasicExecDeclare)s }; }}; @@ -223,7 +223,7 @@ def template McrrOpConstructor {{ %(class_name)s::%(class_name)s(ExtMachInst machInst, IntRegIndex op1, IntRegIndex op2, - IntRegIndex dest, + MiscRegIndex dest, uint32_t imm) : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, op1, op2, dest, imm) |