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| author | Ali Saidi <Ali.Saidi@ARM.com> | 2012-06-29 11:18:29 -0400 |
|---|---|---|
| committer | Ali Saidi <Ali.Saidi@ARM.com> | 2012-06-29 11:18:29 -0400 |
| commit | 71daeb0b2b390f5f5a34addd3993f28851c91d72 (patch) | |
| tree | 8c6c587dc87fef8deecf3b65b8e931e8a3aa78ee /src/arch/arm/isa/templates | |
| parent | 8d1e56bdcd673fd3b1ddfd9ac82f7c1ded3110c4 (diff) | |
| download | gem5-71daeb0b2b390f5f5a34addd3993f28851c91d72.tar.xz | |
ARM: Fix identification of one RAS pop instruction.
The check should be with the op2 field, not with the op1 field.
Diffstat (limited to 'src/arch/arm/isa/templates')
| -rw-r--r-- | src/arch/arm/isa/templates/pred.isa | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/arch/arm/isa/templates/pred.isa b/src/arch/arm/isa/templates/pred.isa index efb8e470b..88e8fecd1 100644 --- a/src/arch/arm/isa/templates/pred.isa +++ b/src/arch/arm/isa/templates/pred.isa @@ -115,11 +115,12 @@ def template DataRegConstructor {{ flags[IsUncondControl] = true; else flags[IsCondControl] = true; - } - if (%(is_ras_pop)s) { - flags[IsReturn] = true; + if (%(is_ras_pop)s) { + flags[IsReturn] = true; + } } + } }}; |