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authorGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:11 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:11 -0500
commitdbee6e0c5406200066b8185fd38fa47dae7cdd2f (patch)
treecc1cb169d8a215010d2adbf1b4eea82d70fa695a /src/arch/arm/isa/templates
parent239c9af90d61b2877a8cee8b91f162e7a0bf1e72 (diff)
downloadgem5-dbee6e0c5406200066b8185fd38fa47dae7cdd2f.tar.xz
ARM: Add a base class for SRS.
Diffstat (limited to 'src/arch/arm/isa/templates')
-rw-r--r--src/arch/arm/isa/templates/mem.isa30
1 files changed, 30 insertions, 0 deletions
diff --git a/src/arch/arm/isa/templates/mem.isa b/src/arch/arm/isa/templates/mem.isa
index 7c93cd4ee..983d99af9 100644
--- a/src/arch/arm/isa/templates/mem.isa
+++ b/src/arch/arm/isa/templates/mem.isa
@@ -409,6 +409,26 @@ def template RfeDeclare {{
};
}};
+def template SrsDeclare {{
+ /**
+ * Static instruction class for "%(mnemonic)s".
+ */
+ class %(class_name)s : public %(base_class)s
+ {
+ public:
+
+ /// Constructor.
+ %(class_name)s(ExtMachInst machInst,
+ uint32_t _regMode, int _mode, bool _wb);
+
+ %(BasicExecDeclare)s
+
+ %(InitiateAccDeclare)s
+
+ %(CompleteAccDeclare)s
+ };
+}};
+
def template SwapDeclare {{
/**
* Static instruction class for "%(mnemonic)s".
@@ -575,6 +595,16 @@ def template RfeConstructor {{
}
}};
+def template SrsConstructor {{
+ inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
+ uint32_t _regMode, int _mode, bool _wb)
+ : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
+ (OperatingMode)_regMode, (AddrMode)_mode, _wb)
+ {
+ %(constructor)s;
+ }
+}};
+
def template SwapConstructor {{
inline %(class_name)s::%(class_name)s(ExtMachInst machInst,
uint32_t _dest, uint32_t _op1, uint32_t _base)